Miscellaneous active electrical nonlinear devices – circuits – and – Gating – Utilizing three or more electrode solid-state device
Reexamination Certificate
2002-02-06
2004-08-03
Le, Dinh T. (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Gating
Utilizing three or more electrode solid-state device
C327S408000, C326S068000
Reexamination Certificate
active
06771113
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a method and/or architecture for implementing voltage tolerance generally and, more particularly, to a voltage tolerant (e.g., 5v) fail-safe input scheme using a source follower configuration.
BACKGROUND OF THE INVENTION
In general a five volt tolerant circuit is a circuit that is able to withstand five volts on the input without compromising reliability while power is being supplied. A five volt fail-safe circuit is a circuit that is able to withstand five volts on the input without compromising reliability while power is either being supplied to the circuit or not being supplied to the circuit.
In a standard CMOS process, NMOS devices are formed in a P-well which is inherently tied to a P type substrate. PMOS devices are formed in an N-well diffusion tub, which is isolated from the substrate and the wells of other PMOS devices. During normal operation, the N well diffusion is tied to VSS. However, to provide five volt fail safe protection, the well of the PMOS device is disconnected from VDD and tied to the PAD voltage whenever the pad rises above VDD. This will prevent the gate to well potential from ever exceeding VDD, even in a power down condition.
It would be desirable to implement a five volt tolerant and fail-safe input scheme using a source follower configuration.
SUMMARY OF THE INVENTION
The present invention concerns an apparatus comprising a device and a resistor (or active device biased to create a resistive element). The device generally comprises (i) a gate configured to receive an input voltage, (ii) a drain coupled to a first supply voltage, and (iii) a source coupled to an output. The resistive element is generally coupled between the source and a second supply voltage. The apparatus generally provides voltage tolerance between the input voltage and the output.
The objects, features, method and/or advantages of the present invention include implementing a circuit that may (i) provide voltage tolerance above a supply voltage (e.g., 5 volts), (ii) provide a fail-safe input scheme, (iii) implement a source follower configuration, and/or (v) be implemented with or without a native device.
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patent: 5712556 (1998-01-01), Okamura
patent: 5942921 (1999-08-01), Talaga, Jr.
patent: 6225855 (2001-05-01), Taguchi
patent: 6441651 (2002-08-01), Lien
patent: 411205048 (1999-07-01), None
Burdick Brian E.
Porter Edson W.
Von Thun Matthew S.
Le Dinh T.
LSI Logic Corporation
Maiorana PC Christopher P.
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