Five-level switched-capacitor DAC, method of operation thereof a

Coded data generation or conversion – Analog to or from digital conversion – Digital to analog conversion

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341143, H03M 166, H03M 300

Patent

active

060812184

ABSTRACT:
A digital-to-analog converter (DAC) and a method of converting digital numbers to analog equivalents. In one embodiment, the DAC includes: (1) a data decoder that receives a digital number and an input clock signal and develops therefrom SIGN and M control signals and complementary .phi..sub.1 and .phi..sub.2 clock signals and (2) a conversion circuit, coupled to the data decoder and including first and second operational amplifiers (op amps), a switching circuit and sampling and integrating capacitors, the switching circuit coupling positive and negative reference voltages to the sampling capacitors as a function of states of the SIGN and M control signals and adjusting feedback loops associated with the first and second op amps as a function of states of the .phi..sub.1 and .phi..sub.2 clock signals, the first and second op amps generating a voltage difference at outputs thereof representing an analog equivalent of the digital number.

REFERENCES:
patent: 5376936 (1994-12-01), Kerth et al.
patent: 5563957 (1996-10-01), McCartney
patent: 5739781 (1998-04-01), Kagey
patent: 5818377 (1998-10-01), Wieser
patent: 5889485 (1999-03-01), Schneider
Article entitled "A 22-kHz Multibit Switched-Capacitor Sigma-Delta D/A Converter With 92 dB Dynamic Range" by Peicheng Ju, Ken Suyama, Paul F. Ferguson, Jr., Wai Lee; 1995 IEEE Journal of Solid State Circuits, vol. 30 .

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