Firmware transitional programmable sequential logic controller

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364140, G05B 1101

Patent

active

047003260

ABSTRACT:
An apparatus for controlling external devices in a controlled installation following a control sequence includes a scanning pulse generator arranged to generate scanning pulses at regularly offset times, and an input detection circuit comprising transition detectors each of which detectors is adapted to accept a distinct input variable signal associated with an external device or system component and a respective one of said scanning pulses to detect a transition or change of state of the input variable signal. An address signal is produced substantially immediately for accessing a sequential memory in response to the presence of a respective one of said scanning pulses and an input transition. The sequential memory stores data identifying the stages in the control sequence wherein the different storage locations are designated by a respective address defined by the particular input channel and a given stage. The sequential memory is arranged to accept the address signals from the transition detectors at the time an input transition occurs to provide the new stage data in response to each such transition and corresponding address signal. An output function memory stores the command signals for the external devices under control of the apparatus and responds to the new stage data from the sequential memory and level or alarm signals from the controlled installation to provide the associated command signal.

REFERENCES:
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patent: 3764989 (1973-10-01), McClellan
patent: 3889238 (1975-06-01), Sakurai
patent: 3942158 (1976-03-01), Dummermuth
patent: 4162536 (1979-07-01), Morley
patent: 4518872 (1985-05-01), Backes
Comer, Digital Logic and State Machine Design, 1984, CBS College Publishing, New York.

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