FIR filter tap architecture for highly dense layout

Details FIR filter tap architecture for highly dense layout FIR filter tap architecture for highly dense layout

2004-09-10

2009-02-17

Malzahn, David H (Department: 2193)

Electrical computers: arithmetic processing and calculating

Electrical digital calculating computer

Particular function performed

Reexamination Certificate

active

07493354

ABSTRACT:
An area-efficient finite impulse response filter having permuted bit-order functional elements that provide substantially straight and direct interconnects with minimized length between adjacent elements. A functional element is coupled with an input data path and an output data path, at least one of which has a permuted bit-order data path exhibiting bit-order ordinal discontinuity. The permuted bit-order data path also can be a transposed permuted bit-order data path in which the placement of at least part of a data path is transposed, relative to prior art placements. The bit-order ordinal discontinuity fosters short, straight element interconnects which leads to increased spatial efficiency and improved performance.

REFERENCES:
patent: 5887003 (1999-03-01), Ueda

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