Finite state machine with associated memory

Details Finite state machine with associated memory Finite state machine with associated memory

1999-06-11

2003-09-30

Yao, Kwang Bin (Department: 2664)

Multiplex communications

Pathfinding or routing

Switching a message which includes an address header

C370S518000

Reexamination Certificate

active

06628660

ABSTRACT:

TECHNICAL FIELD OF THE INVENTION
The present invention relates generally to the field of electronic devices, and more particularly, to a finite state machine with associated memory.
BACKGROUND OF THE INVENTION
A finite state machine (FSM) performs some predetermined logical operation on data; at any given moment, the current state of data for a finite state machine is referred to as its “context.” With many electronic devices, data is contained in a number of different channels, which are combined into a single, multiplexed signal. As such, finite state machines can be used to process the data in each of the channels of a multiplexed signal.
According to previously developed techniques, when finite state machines are used to process the data in a multiplexed signal, a separate finite state machine is provided for each channel. Since different data within the various channels of the multiplexed signal are often processed in the same way, these finite state machines can be virtually identical. The separate finite state machines are required, however, because for each finite state machine, the data for the corresponding channel is maintained as the current context of that finite state machine. Thus, with previously developed techniques, a single finite state machine is not able to serve all channels of a multiplexed signal. This is inefficient and, with certain electronic devices (such as, integrated circuits), undesirably increases the size of implementation.
SUMMARY
The disadvantages and problems associated with previously developed techniques utilizing finite state machines to operate on multiplexed signals have been substantially reduced or eliminated using the present invention.
In accordance with one embodiment of the present invention, a system receives a multiplexed input signal having a plurality of channels for data. The system includes a finite state machine which performs a predetermined logic operation on data in each of the channels of the multiplexed input signal. A memory, coupled to the finite state machine, stores at least one context of the finite state machine for each of the channels of the multiplexed input signal.
In accordance with another embodiment of the present invention, a method includes the following: receiving input data for one channel of a multiplexed input signal having a number of channels for data; performing a predetermined logic operation on the input data using a finite state machine to generate result data representing a context of the finite state machine for one of the channels; storing the result data representing the context into a memory coupled to the finite state machine; and subsequently restoring the finite state machine to the context using the result data stored in the memory.
In accordance with yet another embodiment of the present invention, a system receives a multiplexed input signal having a plurality of channels for data. The system includes a finite state machine which can be changed into a plurality of configurations. A memory, coupled to the finite state machine, stores configuration information for each configuration of the finite state machine.
An important technical advantage of the present invention includes providing a finite state machine with associated memory for operating on a multiplexed signal. At different moments in time, the finite state machine processes the data in each channel and stores the current state or context for the various channels into memory. Each context can be restored from memory into the finite state machine at a later time. This allows a single finite state machine to be used for multiple channels of a multiplexed signal. The present invention thus provides increased efficiency in implementation because multiple finite state machines are not required. This translates into a savings in gate cost and, for integrated circuit devices, surface area. Other important technical advantages are readily apparent to one skilled in the art from the following figures, descriptions, and claims.


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PMC-Sierra, Inc. Data Sheet, “Frame Engine And DataLink Manager,” Issue 5: May 1998, (330 total page).

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