Finite metastable time synchronizer

Details Finite metastable time synchronizer Finite metastable time synchronizer

1987-11-24

1989-04-11

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

3072722, 307480, 307279, 328 63, 377117, 377 79, H03K 513, H03K 1900

Patent

active

048209392

ABSTRACT:
A synchronizer circuit having a predictable and finite metastable time, and thereby a finite sample interval, resulting in the minimization of the probability of errors in asynchronous information transfer.

REFERENCES:
patent: 4093878 (1978-06-01), Paschal et al.
patent: 4398105 (1983-08-01), Keller
patent: 4498176 (1985-02-01), Wagner
patent: 4529892 (1985-07-01), Reilly et al.
patent: 4591737 (1986-05-01), Campbell
patent: 4667339 (1987-05-01), Tubbs et al.
patent: 4703200 (1987-10-01), Zangara
Chaney et al., "Beware the Synchronizer", Compcon 72, 1972, pp. 317-319.
Pechoucek, "Anamolous Response Times of Input Synchronizers", IEEE Transactions on Computers, Feb. 1976, pp. 133-139.
Rosenberger et al., "Flip-Flop Resolving Time Test Circuit", IEEE Journal of Solid-State Circuits, vol. SC-17, No. 4, Aug. 1982, pp. 731-738.

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