Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed
Reexamination Certificate
1999-07-26
2001-01-30
Mai, Tan V. (Department: 2787)
Electrical computers: arithmetic processing and calculating
Electrical digital calculating computer
Particular function performed
Reexamination Certificate
active
06182103
ABSTRACT:
TECHNICAL FIELD
The present invention pertains to low power digital signal processing, specifically, a finite impulse response bandpass filter.
BACKGROUND OF THE INVENTION
In the field of cochlear implants, electrostimulation of the acoustic nerve by the technique of continuous interleaved sampling (CIS) has successfully achieved high levels of speech recognition. The signal processing used in CIS, as implemented in an external speech processor, commonly employs a filter bank for splitting up the audio frequency range. The amplitudes of the stimulation pulses within the cochlea are derived from the envelopes of the band pass filter output signals.
At present, commercially available Digital Signal Processors (DSP) are used to perform speech processing according to CIS. For example, the digital signal processing for a 12-channel CIS typically comprises the following stages:
(1) a digital filter bank having 12 digital Butterworth band pass filters of 6th order, Infinite Impulse Response (IIR) type;
(2) 12 subsequent rectifiers and 12 digital Butterworth low pass filters of 2nd order, IIR-type, for envelope detection; and
(3) a stage for patient specific estimation of the stimulation amplitudes from the envelope signals.
The DSP power consumption in a speech processor typically is about 300 mW. Thus, comparatively large batteries (usually AA-sized) are necessary, resulting in speech processor dimensions of about 90×70×20 mm
3
.
SUMMARY OF THE INVENTION
In accordance with a preferred embodiment of the present invention, there is provided an apparatus for processing an audio input signal with a digital finite-impulse-response (FIR) bandpass filter. In this embodiment, the FIR bandpass filter has an oversampling type analog to digital converter to convert the input audio signal into a digital sequence, a low-pass FIR filter to convolve the binary sequence to produce a low-pass vector, a digital comb filter defined by at least one set of weighted and time-shifted unit impulses to convolve the low-pass vector with the comb filter weights, and an envelope detector to detect a bandpass envelope of the digital FIR bandpass filter.
In further embodiments, the analog to digital converter may use sigma-delta modulation to produce a two-level binary sequence. The low-pass FIR filter may directly convolve the digital sequence by multiplying and accumulating the digital sequence with a low-pass FIR filter impulse response. The low-pass FIR filter may be further comprised of an input filter to convolve the binary sequence to produce a five level sequence, and a peripheral filter to convolve the five level sequence to produce the low-pass vector. The low-pass filter may further include an output counter to downsample the low-pass vector which may further be sequentially stored in a low-pass random access memory (RAM).
Also in further embodiments, the digital comb filter may further include comb filter weight RAM to store the sets of comb filter weights and an Arithmetic Logic Unit (ALU) to calculate a convolution product of the downsampled low-pass vector with the comb filter weights. The comb filter weight RAM may store two orthogonal sets of comb filter weights, in which case, the ALU further calculates convolution products of the downsampled low-pass vector with the two orthogonal sets of comb filter weights. The ALU may comprise the envelope detector, in which case it estimates an envelope of the digital FIR bandpass filter by calculating a square root of a sum of squares of the convolution products of the downsampled low-pass vector with the two orthogonal sets of comb filter weights. The ALU estimates the value of the square root of the sum of two squares by determining the greater of the roots of the two squares and the lesser of the roots of the two squares, calculating a sum of one half the lesser of the roots of the two squares and one half a product of the greater of the roots of the two squares and the square root of three, and selecting whichever is larger between the greater of the roots of the two squares and the sum of one half the lesser of the roots of the two squares and one half the product of the greater of the roots of the two squares and the square root of three.
In accordance with another embodiment of the present invention, a plurality of such digital FIR bandpass filters may be arranged in parallel to form a digital filter bank. In yet a further embodiment, such a digital FIR bandpass filter or a filter bank of such digital FIR bandpass filters may be a subpart of an external portion of a cochlear implant system for providing auditory signals to an implantable portion for implantation into a person.
REFERENCES:
patent: 5227991 (1993-07-01), Lay
patent: 5731769 (1998-03-01), Girardeau, Jr. et al.
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