Finite field inversion

Details Finite field inversion Finite field inversion

1994-10-18

1995-11-14

Envall, Jr., Roy N.

Boots, shoes, and leggings

364761, G06F 700, G06F 1500, G06F 752

Patent

active

054672970

ABSTRACT:
An inversion circuit (212) determines an inverse B.sup.-1 of an m-bit symbol B, the symbol B being expressed in a dual basis representation. Inversion circuit (212) includes an iterative convolution circuit (124A, 124B, 124C) to which the symbol B is applied and which generates and stores electrical signals corresponding to an m-bit value A. The value A is in a first basis representation and is generated by the convolution circuit such that an inner product of A and .alpha..sup.k B is equal to 0 for k<m-1. A feedback circuit (128) is provided for enabling the convolution circuit to perform a convolution with an .alpha. multiple of B. A multiplier circuit (102) is connected to the convolution circuit and generates electrical output signals corresponding to the product of the value A and .alpha..sup.-t. The electrical output signals from the multiplier represent A.alpha..sup.-t =B.sup.-1 (i.e., the inverse of the m-bit symbol B in the first basis representation). When necessary, the m-bit value A is bit-positionally justified, either by operating the convolution circuit as a shift register or by loading the value A into a shift register (132).

REFERENCES:
patent: 4994995 (1991-02-01), Anderson et al.

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