Semiconductor device manufacturing: process – Chemical etching – Combined with the removal of material by nonchemical means
Reexamination Certificate
2001-01-22
2003-04-01
Powell, William A. (Department: 1765)
Semiconductor device manufacturing: process
Chemical etching
Combined with the removal of material by nonchemical means
C156S345120, C216S038000, C216S088000, C216S089000, C216S091000, C438S691000, C438S692000, C438S693000
Reexamination Certificate
active
06541381
ABSTRACT:
BACKGROUND ART
Chemical mechanical polishing (CMP) is generally known in the art. For example U.S. Pat. No. 5,177,908 to Tuttle issued in 1993 describes a finishing element for semiconductor wafers, having a face shaped to provide a constant, or nearly constant, surface contact rate to a workpiece such as a semiconductor wafer in order to effect improved planarity of the workpiece. U.S. Pat. No. 5,234,867 to Schultz et. al. issued in 1993 describes an apparatus for planarizing semiconductor wafers which in a preferred form includes a rotatable platen for polishing a surface of the semiconductor wafer and a motor for rotating the platen and a non-circular pad is mounted atop the platen to engage and polish the surface of the semiconductor wafer.
An objective of polishing of semiconductor layers is to make the semiconductor layers as nearly perfect as possible. Current finishing can suffer from being overly harsh on a workpiece causing unwanted scratching or other unwanted surface damage thus reducing the perfection of the surface. Further, some current finishing pad finishing surfaces can suffer from having a higher than necessary coefficient of friction when finishing a workpiece. This higher than necessary coefficient of friction can lead to other unwanted surface damage. Still further, during finishing a particle can break away from the workpiece surface forming a workpiece abrasive particle which can scratch or damage the workpiece surface. These unwanted effects are particularly important and deleterious to yield when manufacturing electronic wafers which require extremely close tolerances in required planarity and feature sizes.
It is an advantage of this invention to reduce the harshness of finishing on the workpiece surface being finished. It is an advantage of this invention to reduce unwanted scratching or other unwanted surface damage on the workpiece surface during finishing. It is further an advantage of this invention to reduce the coefficient of friction during finishing a workpiece to help reduce unwanted surface damage. It is an advantage of the invention to reduce unwanted damage to the workpiece surface when an abrasive workpiece particle breaks away workpiece surface during finishing. It is further an advantage of this invention to help improve yield for workpieces having extremely close tolerances such as semiconductor wafers.
These and other advantages of the invention will become readily apparent to those of ordinary skill in the art after reading the following disclosure of the invention.
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Beaver Creek Concepts Inc
Powell William A.
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