Active solid-state devices (e.g. – transistors – solid-state diode – Responsive to non-electrical signal
Reexamination Certificate
2001-11-30
2004-07-13
Pham, Long (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Responsive to non-electrical signal
C382S124000
Reexamination Certificate
active
06762470
ABSTRACT:
TECHNICAL FIELD OF THE INVENTION
The present invention relates in general to semiconductor devices and processing methods, and more particularly to the use of an organic polymer protective coating on semiconductor chips having surfaces exposed to the environment.
BACKGROUND OF THE INVENTION
Integrated circuits are employed in many different environments which require protection against mechanical damage, chemical deterioration, electromagnetic and electrostatic invasion, and a host of other agents. Conventional integrated circuits are fabricated on wafers, each of which consists primarily of a monocrystalline silicon substrate. Upon completion of the fabrication process, the wafer is sliced into separate square or rectangular chips, each including a complete integrated circuit, which is then encapsulated to form a finished device.
The manner in which an integrated circuit is fabricated and packaged determines in a large part how well the chip is protected from the foregoing environmental effects. The outer package of an integrated chip is intended to provide mechanical protection, and to a certain degree moisture protection. The integrated chip itself is fabricated with various passivation layers to provide intimate protection from numerous environmental attacks, including ion diffusion (sodium ions especially) into the active circuitry of the semiconductor chip. An industry standard for passivation of a semiconductor chip is to deposit an inorganic silicon nitride material over the surface of the chip. This passivation material provides an excellent barrier and protects the active circuitry from the adverse effects of moisture, sodium and other similar ions.
Integrated circuits have traditionally been packaged with a plastic, ceramic or other type of encapsulating material to provide mechanical and moisture protection to the chip. The pins or contact pads of the packaged chip are accessible to provide electrical access to the circuits of the chip. This is a common packaging technique, as the only access required to the chip is by way of electrical signals.
A new generation of integrated circuit chips has evolved where a mechanical or physical input to the chip is necessary. One such type of integrated circuit is used in the biometric field where a physical input, such as a finger touch to the chip, is used so that corresponding signals can be processed by the chip to produce an output related to the touch. In one family of integrated chips, a surface or physical interface of the chip is not encased or encapsulated in the conventional manner, but rather is accessible for touching by a fingertip so the image of a fingerprint can be electrically generated by the circuits of the chip. An array of sensing capacitors is fabricated near the exposed surface of the chip to sense the ridges and valleys of the fingerprint. Such type of integrated circuit is disclosed in U.S. Pat. No. 6,114,862 by Tartagni, et. al., assigned to the assignee hereof. Other sensing techniques are available in integrated circuits for reproducing a person's fingerprint when the integrated circuit is touched.
When a physical interface is necessary between the integrated circuit chip and the environment, special precautions must be taken, as the use of conventional encapsulation is often not an option. The physical interface must not interfere with the interaction between the environment and the chip, whether it be the texture of an object such as a fingerprint, the temperature of the article physically contacting the chip interface, optical inputs, etc. When an integrated circuit chip is provided with a physical interface exposed to the environment, there is always a concern that such an interface is sufficiently rugged, but yet also sufficiently protective to the underlying circuits. Conventionally, the physical interface to biometric fingerprint sensors involves the use of a very thin silicon carbide layer covering a silicon nitride passivation layer. Silicon carbide is well known for its durability, in that it is an extremely hard material. When used with capacitor-type fingerprint sensors, the thickness of the passivation layer and the physical protective layer should be relatively thin so as not to compromise the sensitivity of the sensing circuits to the differences in the physical properties that exist between the ridges (flesh) and valleys (air gaps) of the fingerprint. It has been found that when a thin silicon carbide layer is used for the physical interface, it is very durable and highly wear resistant, but can nevertheless crack or break when subjected to concentrated loads. Although the silicon carbide material provides an extremely hard physical interface, the brittle characteristic of such material is a disadvantage, especially when it is subjected to impact forces produced by sharp or pointed objects.
FIG. 1
illustrates the material layers of a conventional semiconductor chip of the type that has a physical interface to the environment. In this type of integrated circuit, a metal layer
10
forming a network is deposited on an intermediate layer, and patterned, so as to form a matrix of fringing capacitors to sense the ridges and valleys of a fingerprint. The principle of operation of such type of integrated circuit is set forth in more detail in U.S. Pat. No. 6,114,862, noted above. The basic structure includes two side-by-side capacitor plates at each sensor cell or pixel of an array of such pixels. The skin surface of the user's finger, when pressed against the sensing surface or physical interface, forms a common capacitor plate with the side-by-side plates at each pixel and effectively modulates the fringing capacitance between the plates. The change in the fringing capacitance is sensed to determine the presence of a fingerprint ridge or valley at the particular pixel location. A plurality of pixels arranged in a matrix thus provide a complete image of the fingerprint.
In the construction of a fringing capacitor, touch-sensitive chip, a dielectric layer
12
is deposited over the silicon wafer or substrate
14
. An interconnect metal
16
is deposited over the dielectric layer
12
and patterned to provide interconnections between circuits formed in the silicon material of the substrate
14
. At this point, the device structure is planarized by depositing a material
18
over the patterned metal
16
and planarizing the material
18
. One or more intermediate layers
20
and
22
may be formed over the planarized surface of the device. The metal network
10
forming the plates of the fringing capacitors is formed on the intermediate layers
20
and
22
, and again planarized using a material
24
, such as a conventional FOX spin-on glass, or other suitable material.
In order to provide a mechanical and chemical protective coating over the surface of the touch-sensitive portion of the chip, it is a conventional practice to form one or more passivation layers of a hard and chemically resistant material, such as silicon nitride
26
and/or silicon carbide
28
. In many instances, even when a silicon carbide passivation layer is employed, an underlying silicon nitride layer is also used, as it is well accepted in the industry for its excellent passivation properties. In other words, when the passivation of a new chip constitutes at least some silicon nitride, the chips are more readily accepted and qualified according to conventional semiconductor processing standards. Semiconductor industry standards recognize that silicon nitride is excellent in providing a barrier to ionic diffusion and moisture ingestion. While these passivation materials are well suited for standard semiconductor chips, such materials have many of the shortcomings noted above.
The selection of a passivation material for a semiconductor chip that requires an environmental interface is important, insofar as the dielectric constant is concerned. This is especially the case when touch-sensitive chips are concerned. In this type of chip, perturbations in the capacitive electric field are sensed to determine the co
Lane Fred P.
Siegel Harry M.
Duy Mai Anh
Jorgenson Lisa K.
Pham Long
STMicroelectronics Inc.
Thoma Peter J.
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