Fingerprint image capture device with a passive sensor array

Measuring and testing – Dynamometers – Responsive to multiple loads or load components

Reexamination Certificate

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Reexamination Certificate

active

06672174

ABSTRACT:

BACKGROUND
1. Field of the Invention
The invention relates generally to devices that sense textures and represent them using signals. More specifically, the invention relates to devices that sense fingerprints and other textured surfaces allowing them to thereby be represented as images.
2. Related Art
The fingerprint image sensing industry uses two prominent technologies to capture images of an individual's fingerprints for use in electronic security applications—(1) optical-based sensors, and (2) capacitance-based sensors. By design, most, if not all, such sensors employ a small-sized two-dimensional array of elementary sensor cells on a silicon chip. When a finger is placed on this small-sized sensor array, electronic circuitry scans each sensor cell in the sensor array for an applicable output. The output from each cell is a measure indicative of the distance between the fingerprint features (such as ridges) and the sensor cell at that location. A composite map of these distances translates into and represents an image of the fingerprint.
In order to be able to scan each cell of the sensor array during the acquisition of a fingerprint image, CMOS (Complementary Metal-Oxide Semiconductor)-based active switching devices (such as transistors or diodes) are placed at each cell, thus making the sensor array an “active” device built on a silicon substrate. In addition, other CMOS-based addressing circuitry, such as row and column multiplexers, are often used to selectively address each row and each column of the sensor array. In addition, to process and transmit the resultant signals, still other CMOS circuitry, such as amplifiers, voltage comparators, and A/D (Analog-to-Digital) converters, must also be included. Typically, these addressing and processing electronics are also integrated onto the same silicon substrate chip outside the area of the active sensor array.
One significant drawback of the above-mentioned silicon-based sensor arrays and the associated addressing and processing circuitry is the cost involved in integrating these on the same substrate. The size of the active array, and hence the size of the sensor chip, must be large enough to accommodate the size of a normal fingerprint and the additional circuitry. Consequently, the sensor chip dimensions become large, typically on the order of 15 mm by 15 mm. Since silicon chip processing is conducted on silicon wafers that are typically 150-200 mm in diameter, relatively few sensor chips can be obtained from a single wafer. As a result, the cost of each sensor chip can be significant. This cost prevents deploying such fingerprint sensors into security devices employed in consumer devices such as computers, wireless and hand-held devices, internet appliances, and in other physical access control applications, which are all very cost sensitive. In addition, most of the sensors that use CMOS type processing for the sensor array and associated electronics are adversely affected by ambient environmental conditions at the time of sensing and also by electrostatic discharge (ESD), if any.
What is needed is an apparatus employing a small sensor that fits into most consumer electronics and other applications while remaining inexpensive enough to match the low cost requirements of a mass market.
SUMMARY OF THE INVENTION
In one embodiment of the invention, a fingerprint-sensing device includes a sensor array that does not use active switching elements fabricated on a base that also includes an interconnect structure. Sensor support integrated circuits that provide processing and addressing circuitry are formed separately and then bonded to the base using the interconnect structure to ensure proper electrical connections. Thus, the processing and address circuitry is not integrated with the sensor array, but is electrically connected to it using conductive paths that make up the interconnect structure within the base. In one embodiment, the processing and addressing circuitry contains two separately formed sensor support integrated circuits that are placed on the base adjacent to the edges of the sensor array formed thereon. Various signals are communicated to and from the sensor support integrated circuits using the interconnect structure within the base from the sensor array. In addition, to communicate to a power source and to other external devices, a separate cable may be attached to the base and electrically connected to one or more of the sensor support integrated circuits. Alternatively, the sensor array may be formed as a distinct semiconductor circuit and then attached to a separate base.
In one embodiment of the invention, the sensor array uses a two-dimensional array of cells, each of which preferably contains only passive elements.
In other embodiments, the sensor support integrated circuits can be covered by a bezel structure, and the sensor array can be encapsulated with a covering material.


REFERENCES:
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patent: 5016481 (1991-05-01), Jacobsen et al.
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patent: 6049327 (2000-04-01), Walker et al.
patent: 6497430 (2002-12-01), Odom et al.
patent: 0 769 754 (1997-04-01), None
patent: WO 94/25938 (1994-11-01), None
patent: WO 97/17668 (1997-05-01), None
patent: WO 00/06023 (2000-02-01), None

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