Fine string compensation to minimize digital to analog...

Details Fine string compensation to minimize digital to analog... Fine string compensation to minimize digital to analog...

2005-10-25

2005-10-25

Williams, Howard L. (Department: 2819)

Coded data generation or conversion

Analog to or from digital conversion

Digital to analog conversion

C341S154000

Reexamination Certificate

active

06958720

ABSTRACT:
Disclosed is a process for minimizing digital-to-analog converter differential nonlinearity by adjusting taps in resistive elements in a fine resistor string voltage divider circuit. Active buffer circuits can be eliminated while still minimizing DAC DNL and insuring circuit monoticity.

REFERENCES:
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patent: 5252975 (1993-10-01), Yuasa et al.
patent: 5969657 (1999-10-01), Dempsey et al.
Post et al.; A 14 Bit Monotonic NMOS D/A Converter; Jun. 1983; IEEE Journal of Solid-State Circuits, vol. SC-18, No. 3; pp. 297-301.
Roubik Gregorian, “Introduction to CMOS OP-AMPS and Comparators,” pp. 218-231, A Wiley-Interscience Publication 1999, no month.

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