Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Metallic housing or support
Reexamination Certificate
1998-12-15
2002-08-06
Pham, Long (Department: 2823)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Metallic housing or support
C438S106000, C438S123000, C438S461000, C257S666000, C257S676000
Reexamination Certificate
active
06429050
ABSTRACT:
FIELD OF THE INVENTION
The invention relates to lead frames, and more particularly to a lead frame having finely pitched leads, and the method of making.
BACKGROUND OF THE INVENTION
Conventional fine-pitched lead frame designs rely upon lead separation in the X-Y plane to prevent electrical shorting between adjacent leads. In some designs, an insulating tape is placed across the leads to stabilize them and to hold them in place. However, as lead pitch (distance between the center lines of the leads) gets finer, and the number of leads increase, other means must be used to prevent shorting of lead.
Fine pitched leads have been formed with the lead end adjacent to the semiconductor die reduce in thickness and tapered to provide narrower leads as the leads converge toward the semiconductor die. A similar lead is disclosed in U.S. Pat. No. 5,454,905.
SUMMARY OF THE INVENTION
The invention is a lead frame that has leads formed in two levels during the etching process in which the lead frame is formed. A lead frame form, or continuous strip of lead frame material, is coated on two sides with a photo resist material. Each photo resist coated side is patterned to define leads on the lead frame. The lead patterns on the two sides are offset from each other so that patterns on one side of the lead frame material alternate with the patterns on the other side of the lead frame material. Both sides of the photo resist patterned lead frame material are etched to a depth exceeding one-half the thickness of a lead. The photo resist material is then removed. The resulting lead frame has leads that are in two levels, each level having leads offset by a lead width from the other level, but with an effective zero distance between leads horizontally.
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patent: 4329642 (1982-05-01), Luthi et al.
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patent: 5221428 (1993-06-01), Ohsawa et al.
patent: 5230144 (1993-07-01), Ootsuki
patent: 5403466 (1995-04-01), West et al.
patent: 5466966 (1995-11-01), Ito
patent: 5683943 (1997-11-01), Yamada
patent: 5945259 (1999-08-01), Kim
Abbott Donald C.
Fritzsche Robert M.
Brady III W. James
Brairton Scott
Pham Long
Skrehot Michael K.
Telecky , Jr. Frederick J.
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