Semiconductor device manufacturing: process – Substrate or mask aligning feature
Reexamination Certificate
2000-07-03
2001-12-11
Fourson, George (Department: 2823)
Semiconductor device manufacturing: process
Substrate or mask aligning feature
C438S734000
Reexamination Certificate
active
06329306
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an exposure method in photolithography for forming a fine pattern in a semiconductor device such as a semiconductor integrated circuit, and further to a semiconductor device and a manufacturing method thereof using the exposure method.
2. Description of the Prior Art
To form a pattern of a semiconductor integrated circuit, improvement of the overlap accuracy between mask layers is important. The mask-layer overlap accuracy is determined by many factors, including a mark detection accuracy in the stepper, the distortion of the wafer due to process treatment, and the field distortion of the stepper. Distortion of the photomask serving as the original plate is one of the most important of the above factors. The existing photomask manufacturing method has a mask-pattern position accuracy of approx. ±0.07 mm. Therefore, in this case, patterns of two masks which should originally be located at the same position may be formed with a separation of approx. 0.03 mm from each other on a wafer projected with a reduction factor up to 1/5. The net overlap accuracy of mask patterns has been approx. ±0.06 mm so far, which is equivalent to 0.12 mm in range. Therefore, the position uncertainty of the mask consumes approx. ¼ the range.
This problem has been improved so far by improving mask manufacturing accuracy. However, because the position control technique in the mask manufacturing is already very precise, further improvement is expected to be difficult. The present invention is designed to improve the overlap accuracy between plural mask layers in forming a pattern of a semiconductor integrated circuit as stated above.
SUMMARY OF THE INVENTION
The purpose of the present invention is to provide an improved projection exposure method for automatically negating the influence of a mask error on overlap accuracy in the mask manufacturing method, and further to provide a semiconductor device and manufacturing method thereof using the above exposure method.
According to one aspect of the present invention, in a method of manufacturing a semiconductor device on a semiconductor substrate, a first layer (for instance, a interlayer conducting paths layer) is formed through a first resist pattern which in turn is formed by an exposure of a first mask (for instance, a hole pattern mask). Also, a second layer (for instance, a parallel lead layer) is formed adjacent to the first layer through a second resist pattern which in turn is formed by double exposure of a second mask (for instance, a parallel lead mask) and the first mask.
In another aspect of the present invention, in the method of manufacturing a semiconductor device, the first mask is for forming a pattern of a plurality of holes perpendicular to the principal plane of the semiconductor substrate, and the second mask is for forming a pattern of a plurality of lines parallel to the principal plane of the semiconductor substrate.
In another aspect of the present invention, in the method of manufacturing a semiconductor device, the first layer is composed of a plurality of inter layer conductive paths perpendicular to the principal plane of the semiconductor substrate, and the second layer is composed of a plurality of conductive lines parallel to the principal plane of the semiconductor substrate.
In another aspect of the present invention, in the method of manufacturing a semiconductor device, a plurality of inter layer conductive paths perpendicular to the principal plane of the semiconductor substrate are first formed by a first mask, and then a plurality of conductive lines parallel to the principal plane of the semiconductor substrate are formed by a second mask and the first mask, and further each line is positioned on at least one of the conductive paths.
In another aspect of the present invention, in the method of manufacturing a semiconductor device, a plurality of conductive lines parallel to the principal plane of the semiconductor substrate are formed first by the second mask and the first mask, and then a plurality of inter layer conductive path perpendicular to a principal plane of the semiconductor substrate are formed by the second mask, and further each conductive path is positioned between the lines.
In another aspect of the present invention, in the method of manufacturing a semiconductor device, the first mask includes al least two Levenson phase shift mask, and the second mask includes at least one Levenson phase shift mask.
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Hisashi Watanabe “2×2 Phase Mask For Artitrary Pattern Formation” Jpn. J. Appl. Phys. vol. 33 (1994) pp. 6790-6795 Part 1, No. 12B, Dec. 1994.
Fourson George
Mitsubishi Denki & Kabushiki Kaisha
Oblon & Spivak, McClelland, Maier & Neustadt P.C.
Pham Thanh V
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