Filter-provided device

Coded data generation or conversion – Digital code to digital code converters

Reexamination Certificate

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Details

C341S155000

Reexamination Certificate

active

06492914

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a filter-provided device with a filter in which a frequency value indicative of a passing frequency characteristic is set according to a value of a current inputted as a controlling signal, and specifically to a filter-provided device which is suitable for controlling a cut-off frequency of a low-pass filter of a high-frequency receiving device which receives a digital signal and demodulates the received digital signal.
BACKGROUND OF THE INVENTION
Conventionally, a filter-provided device with a filter in which a frequency value indicative of a passing frequency characteristic is set according to a value of a current inputted as a controlling signal includes a high-frequency receiving device which is used in a tuner of a satellite broadcast etc.
FIG. 5
is a circuit block diagram schematically showing a structure of a conventional high-frequency receiving device
100
, and describes a case where the filter is a low-pass filter, and the frequency value indicative of the passing frequency characteristic is a cut-off frequency. In the high-frequency receiving device
100
of
FIG. 5
, when a high-frequency signal which is subject to a digital modulation is inputted, an amplifying circuit
102
amplifies a received signal, and further, an amplifying circuit
103
amplifies an output signal of the amplifying circuit
102
at a controlled gain. Next, the output signal of the amplifying circuit
103
is inputted to frequency changing circuits
104
and
105
, and the frequency changing circuits
104
and
105
mix the signal inputted from the amplifying circuit
103
and a signal inputted from a phase shifting circuit
106
, and outputs a base band signal.
Further, a PLL (Phase Locked Loop) circuit
108
to which a controlling signal S
1
for determining a dividing ratio is inputted, controls a phase of a local oscillating signal which is generated in a local oscillating circuit
107
, and is almost equal to a center frequency of a received frequency, based on a reference frequency signal generated in a reference signal oscillator
109
, and the local oscillating signal of the local oscillating circuit
107
is inputted to the phase shifting circuit
106
. The phase shifting circuit
106
generates a signal whose phase is shifted 90° with respect to the local oscillating signal, and inputs the local oscillating signal of the original phase to one of the frequency changing circuits
104
and
105
, and inputs the 90° shifted signal to the other.
The output signals of the frequency changing circuits
104
and
105
are inputted to low-pass filters
110
and
111
respectively, and the low-pass filters
110
and
111
remove a high-frequency component of the inputted signals. The output signals of the low-pass filters
110
and
111
are inputted to AGC (Automatic Gain Control) amplifiers
112
and
113
respectively, and the AGC amplifiers
112
and
113
amplify the inputted signals at a controlled gain. The output signals of the AGC amplifiers
112
and
113
are inputted to low-pass filters
114
and
115
respectively, and the low-pass filters
114
and
115
remove interfering signals of adjacent channels or noise from the inputted signals at a cut-off frequency controlled by a controlling circuit
130
described later. The output signals of the low-pass filters
114
and
115
are inputted to A/D converters
118
and
119
after being amplified by amplifying circuits
116
and
117
. The A/D converters
118
and
119
convert analog signals to digital signals so as to perform a demodulating process in a demodulating circuit
120
described later. The output signals of the A/D converters
118
and
119
are inputted to a demodulating circuit
120
, and the demodulating circuit
120
demodulates the input signals which are subject to a digital modulation, and outputs a transport signal TS.
Further, a PLL circuit
122
to which a controlling signal S
2
for determining the dividing ratio is inputted controls a phase of a local oscillating signal of a predetermined frequency which is generated in a local oscillating circuit
121
, based on a reference frequency signal generated in a reference signal oscillator
123
, and the local oscillating signal whose phase is controlled is inputted to the A/D converters
118
and
119
and the demodulating circuit
120
. The A/D converters
118
and
119
and the demodulating circuit
120
are operated in accordance with the local oscillating signal as an operating signal. The operating signal becomes a sampling clock signal with respect to the A/D converters
118
and
119
.
The low-pass filters
114
and
115
remove interfering signals of adjacent channels or noise, and function as an anti-aliasing of the A/D converters
118
and
119
. The input signal has the modulating rate of several megabaud to dozens of megabaud. Thus, in order to make the low-pass filters
114
and
115
function effectively, it is required to set a cut-off frequency not to a fixed value, but to a suitable value according to the baud rate of the input signal. Further, when a cut-off frequency setting circuit is made up of a resistance and a capacitor in a circuit in an IC (Integrated Circuit), a variation of an IC process brings about a variation of the cut-off frequency of ±15% to ±20% . Thus, in a controlling circuit
130
shown in
FIG. 5
, a constant current source
137
is formed, and cut-off frequencies of the low-pass filters
114
and
115
are set by varying a constant current outputted from the constant current source
137
by the controlling circuit
131
. In the constant current source
137
, a signal generated based on a reference frequency signal which was generated in a reference signal oscillator
124
such as a crystal oscillator and has an accurate frequency (4 MHz in
FIG. 5
) is used as an input signal.
A circuit for generating the input signal of the constant current source
137
is a loop which includes a phase shift circuit
132
, a mixer
133
, a low-pass filter
134
, a DC amplifying circuit
135
, and a constant current source
136
. The phase shift circuit
132
brings 90° shift to a phase of a reference frequency signal inputted from the reference signal oscillator
124
. The signal whose phase is shifted 90° and the reference frequency signal outputted from the reference signal oscillator
124
are inputted to the mixer
133
. The mixer
133
performs multiplication of the both signals, and the low-pass filter
134
removes a high-frequency component of an output signal of the mixer
133
. Further, a DC amplifying circuit
135
amplifies an output signal of the low-pass filter
134
. An output signal of the DC amplifying circuit
135
is inputted to the constant current sources
136
and
137
, and the constant current sources
136
and
137
vary a current value based on the output current
135
. A constant current of the constant current source
136
is inputted to the phase shift circuit
132
, and the loop performs a control so that an output signal of the mixer
133
MIX
out
=0. Thus, the constant current sources
136
and
137
output constant currents according to a frequency of the reference frequency signal (4 MHz in FIG.
5
).
The controlling circuit
131
includes a switch circuit based on a current mirror circuit, and is switched based on a controlling signal S
3
which is inputted from outside according to a desired frequency, and adjusts a value of the constant current outputted from the constant current source
137
to a value according to a target cut-off frequency of the low-pass filters
114
and
115
. An adjusting ratio is determined by the controlling signal S
3
, and is arbitrary. Further, a current outputted from the controlling circuit
131
is inputted as a controlling signal for controlling the cut-off frequency to the low-pass filters
114
and
115
respectively.
The low-pass filters
114
and
115
whose cut-off frequencies are controlled by the current outputted from the controlling circuit
130
arranged in this way are realized with

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