Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed
Reexamination Certificate
2006-02-07
2006-02-07
Mai, Tan V. (Department: 2193)
Electrical computers: arithmetic processing and calculating
Electrical digital calculating computer
Particular function performed
Reexamination Certificate
active
06996593
ABSTRACT:
This invention has as its object to suppress an increase in circuit scale and to simplify a circuit structure by executing a filter process using a plurality of arithmetic units each of which makes multiplication and addition. To achieve this object, image data Yn+2, Yn+3, and Yn+4 to be processed are read out, and three lattice point data d′n+1, S′n, and dn−1 are respectively read out from sequences H1, H2, and H3corresponding to line buffers that store the lattice point data. d′n+3=Yn+3+α(Yn+2+Yn+4) is computed, and d′n+3 is stored in the sequence H1. S′n+2+β(d′n+1+d′n+3) is computed, and S′n+2 is stored in the sequence H2. d′n+1=d′n+1+y(S′n+2+S′n) is computed, and dn+1 is stored in the sequence H3. Sn=S′n+δ(dn−1+dn+1) is computed, and Sn and dn+1 are output to the next processing stage.
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Canon Kabushiki Kaisha
Fitzpatrick ,Cella, Harper & Scinto
Mai Tan V.
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