Filter device

Television – Image signal processing circuitry specific to television – Noise or undesired signal reduction

Reexamination Certificate

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Details

C375S229000, C348S571000, C348S607000

Reexamination Certificate

active

07570307

ABSTRACT:
A filter device comprises a digital filter, a maximum/minimum detector circuit, and a limiter circuit. The digital filter includes unit delay elements chained together and having M stages (M is an integer equal to or larger than two) for shifting an n-bit (n is a positive integer) digital input signal; n multiplier circuits for multiplying output signals from the unit delay elements at the respective stages by predetermined filter coefficients, respectively; and adder circuits chained together and having (M−1) stages for summing output signals from the respective multiplier circuits to supply a filtered output signal. The maximum/minimum detector circuit detects a maximum value detection signal and a minimum value detection signal in the output signals supplied from the unit delay elements. The limiter circuit limits a minimum value of the filtered output signal based on the maximum value detection signal, and limits a minimum value of the filtered output signal based on the minimum value detection signal.

REFERENCES:
patent: 5638134 (1997-06-01), Kameyama et al.
patent: 6483941 (2002-11-01), Li
patent: 6690429 (2004-02-01), Kim
patent: 2004/0125113 (2004-07-01), Kempf et al.
patent: 08-079558 (1996-03-01), None
patent: 2002-094358 (2002-03-01), None

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