Filter circuit, front end of communication system including...

Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – Unwanted signal suppression

Reexamination Certificate

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Details

C327S558000

Reexamination Certificate

active

06825712

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to filter circuits suitable for use in communication systems having asymmetric communication channels such as ADSL communication. The invention also relates to front ends having the filter circuits and communication devices having the same.
In communication systems having asymmetric communication channels, such as ADSL communication, the communication channels are asymmetric such that the downstream data rate is fast whereas the upstream data rate is relatively slow. Asymmetric communication systems have received considerable attention as they can achieve high-speed communication at low cost. Cost reduction of the equipment for realizing such communication systems has also become an issue. In addition, in order to reduce the size of the front end, which is a transmitting and receiving section in such a communication system, it has been required to reduce the circuit area of the front end.
FIG. 6
is a block diagram showing the configuration of a conventional front end in an asymmetric communication system, which serves as a transmitting and receiving section. The front end is provided with a signal receiving terminal
51
, and communication signals received at the signal receiving terminal
51
are input to a receiver
52
.
The front end is further provided with a first to a third filter circuits
53
,
54
, and
55
. The first filter circuit
53
and the third filter circuit
55
have a high cutoff frequency, whereas the second filter circuit
54
has a low cutoff frequency.
The output from the receiver
52
is filtered by either one of the first filter circuit
53
or the third filter circuit
55
, is thereafter converted in to a digital signal by a receiving-side A-D converter
58
, and is then output from a digital signal output terminal
59
to a digital processing section, which is not shown in the drawing.
The digital signal processed in the digital processing section is input from a digital signal input terminal
61
, is thereafter converted into an analog signal by a transmitting-side D-A converter
62
, and is then filtered by either one of the second filter circuit
54
or the third filter circuit
55
. The filtered analog signal is transmitted from a signal-transmitting terminal
65
by a driver
64
.
The output from the receiver
52
is supplied to the first filter circuit
53
directly, and is also supplied to the third filter
55
via an input switching circuit
57
. The input switching circuit
57
is also supplied with the output from the transmitting-side D-A converter
62
.
The output from the first filter circuit
53
is supplied to the A-D converter
58
via a first output switching circuit
56
. The first output switching circuit
56
is also supplied with the output from the third filter circuit
55
.
The output from the transmitting-side D-A converter
62
is supplied to the third filter circuit
55
via the input switching circuit
57
, as described above, and is also supplied to the second filter circuit
54
directly. The output from the second filter circuit
54
is supplied to the driver
64
via a second output switching circuit
63
. The second output switching circuit
63
is also supplied with the output from the third filter circuit
55
.
In the front end thus configured, according to switching operations of the input switching circuit
57
and the first output switching circuit
56
, the output from the receiver
52
is filtered by either one of the first filter circuit
53
or the third filter circuit
55
, which is thereafter supplied to the A-D converter
58
.
The output from the transmitting-side D-A converter
62
is filtered by either one of the second filter circuit
54
or the third filter circuit
55
according to switching operations of the input switching circuit
57
and the second output switching circuit
63
, which is thereafter supplied to the driver
64
.
The third filter circuit
55
is selected by the input switching circuit
57
so that it is used for a filtering process for only one of the received signals or the transmitted signals.
FIG. 7
shows a block diagram schematically illustrating the configuration of a filter circuit used for the first to third filter circuits
53
to
55
. Normally, a filter circuit
70
is constructed such that a resistor block
72
that includes a plurality of resistors is connected to an amplifier block
73
that includes a plurality of amplifiers by a connector bus
76
, and the amplifier block
73
is connected to a capacitor block
74
that includes a plurality of capacitors by a connector bus
77
.
The signals received at a receiving terminal
71
connected to the resistor block
72
are filtered by the filter circuit
70
, and thereafter is output from an output terminal
75
connected to the amplifier block
73
to the outside of the filter circuit
70
.
FIG. 8
is a circuit diagram showing the detailed configuration of the filter circuit
70
. The filter circuit
70
is a fourth-order filter circuit, and the amplifier block
73
is provided with four amplifiers
73
a
. The capacitor block
74
likewise has four capacitors
74
a
. Each of the capacitors
74
a
comprises two capacitor elements. The resistor block
72
has four resistors
72
a
, and each of the resistors
72
a
comprises a plurality of resistor elements. An amplifier
73
a
in the amplifier block
73
that is positioned at the rightmost side in the figure is connected to an output terminal
75
of the fourth-order filter circuit
70
.
Because this conventional filter circuit
70
has the resistor block
72
, the amplifier block
73
, and the capacitor block
74
as shown in
FIG. 8
, it requires a large mounting area. Particularly, the amplifier block
73
and the capacitor block
74
, which include a plurality of amplifiers
73
a
and a plurality of capacitor
74
a
, respectively, have large areas and therefore necessitate a larger mounting area than the resistor block
72
, which includes a plurality of resistors
72
a
. As a result, the front end having three filter circuits
53
to
55
as shown in
FIG. 6
inevitably requires a considerably large circuit scale, which is undesirable.
In addition, it is feared that distortion characteristic of the signals degrades because, for the purpose of switching of the three filter circuits
53
to
55
, the input switching circuit
57
and the first and the second output switching circuit
56
and
63
are provided in the signal communication channel.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a filter circuit in which the circuit scale can be reduced and the signal quality improved, and to provide a front end for an asymmetric communication system in which the filter circuit is incorporated, as well as a communication device incorporating the same.
In order to achieve the foregoing and other objects, the invention takes advantage of the fact that, in cases where a plurality of kinds of filter circuits are to be selectively formed, it is possible to configure amplifier blocks having the same value and capacitor blocks having the same value if the resistance values of the resistor blocks in the filter circuits are adjusted, although the values of the amplifier blocks and the values of the capacitor blocks incorporated in the respective filter circuits are different among the amplifier blocks and the capacitor blocks, respectively; and accordingly, in all of the filter circuits, one amplifier block and one capacitor block are commonly used for the amplifier block and the capacitor block that constitute each of the filter circuits, in order to reduce the mounting area.
More specifically, the present invention provides a filter circuit comprising: an amplifier block including a plurality of amplifiers; a capacitor block including a plurality of capacitors, the plurality of capacitors being connected to the plurality of amplifiers included in the amplifier block respectively; a plurality of resistor blocks each including a plurality of resistors; and a resistor block-switching circuit for se

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