Filter circuit for preprocessing a video signal to be coded

Television – Bandwidth reduction system – Data rate reduction

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348607, H04N 7133

Patent

active

053432479

ABSTRACT:
The video signal to be coded is coded in data blocks by a hybrid coder (4) which comprises a picture memory (410A) and a motion estimator (410B) for calculating motion vectors (v). The filter circuit comprises a multiplexer (S1) having two inputs (a1, f1) which applies either the video signal to be coded (a1) or a filtered signal (f2) to the input of the hybrid coder (4) and to the input of a further picture memory (F4). The further picture memory (F4) is arranged in the feedback path of a recursive filter (F) with which the video signal to be coded (a1) is temporally filtered. The multiplexer (S1) is controlled by a control device (S), which multiplexer receives as input data the video signal to be coded (a1), the motion vectors (v) and the data (a410) from the picture memory (410A) of the hybrid coder (4).

REFERENCES:
patent: 4740842 (1988-04-01), Annegarn
patent: 4752826 (1988-06-01), Barnett
patent: 4827338 (1989-05-01), Gerard
patent: 5237413 (1993-08-01), Israelsen
Yashima et al., "Adaptive Prefiltering for HDTV Signal Coding", Proceedings of the Picture Coding Symposium, Apr. 1986, Tokyo, pp. 28-29.

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