Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Passive components in ics
Reexamination Certificate
1998-05-27
2001-11-13
Crane, Sara (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
Passive components in ics
C438S384000
Reexamination Certificate
active
06316816
ABSTRACT:
BACKGROUND OF THE INVENTION
This invention relates to a film resistor useful in semiconductor integrated circuits and a method of producing the resistor. A preferred embodiment of the film resistor is a polysilicon (polycrystalline silicon) resistor.
Resistors in semiconductor integrated circuits are classified roughly into two types, viz. diffused resistors and polysilicon resistors. A diffused resistor is made by defining the geometry of a diffused layer in a semiconductor substrate. A polysilicon resistor is made by patterning a polysilicon film which is deposited on a dielectric layer and is doped with an impurity. In general, polysilicon resistors are relatively small in parasitic capacitance and can define relatively high resistance values in relatively small areas.
In the accompanying drawings,
FIG. 9
shows a conventional polysilicon resistor. On a silicon substrate
50
there is a field oxide layer
52
, and, independent of the polysilicon resistor, a diffused layer
62
is formed in the substrate . Over the field oxide layer
52
and the diffused layer
62
there is a silicon oxide film
54
which is deposited by CVD. For example, the CVD silicon oxide film
54
is 100 nm thick, and the field oxide layer
52
is 500 nm thick. A rectangular pattern of a doped polysilicon film
56
is formed on the silicon oxide film
54
. In the area above the diffused layer
62
the polysilicon film
56
does not exist. The polysilicon film
56
and the silicon oxide film
54
are overlaid with another silicon oxide film
58
which is deposited by CVD, and the silicon oxide film
58
is overlaid with a borophospho-silicate glass (BPSG) film
60
which is planarized. A pair of contact windows
64
are opened in the BPSG film
60
and the silicon oxide film
58
above the polysilicon film
56
, and another contact window
66
is opened in the BPSG film
60
and silicon oxide films
58
and
54
above the diffused layer
62
. As a barrier metal, a TiN film
68
is formed on the surfaces in every contact window
64
,
66
, and every contact window
64
,
66
is filled with a contact metal
70
such as W (tungsten). On the contact metal
70
, electrodes or interconnections are provided by a patterned metal film
72
such as an Al—Si—Cu film. In this polysilicon resistor the contact metal
70
connects with the polysilicon film
56
at the upper surface of the polysilicon film.
A problem in the conventional polysilicon resistor is a considerable variation in contact resistance. The sheet resistance of the polysilicon film is primarily determined by the concentration of the impurity doped into polysilicon. Usually the impurity is introduced into the polysilicon film by ion implantation. Therefore, in the doped film the impurity concentration is gradient in the thickness direction. In the fabrication process the contact windows
64
for the polysilicon film
54
and the contact window
66
for the diffused layer
62
are formed simultaneously by an etching process. Therefore, it is inevitable that the polysilicon film
56
undergoes etching to some extent, which is uncontrollable. As a result, the thickness of the polysilicon film
56
under the contact windows
64
is considerably variable, and hence the impurity concentration in the polysilicon film at the bottom of the contact windows
64
is considerably variable. For this reason the contact resistance at the bottom of the contact windows
64
is considerably variable.
To minimize the extent of undesirable etching of the polysilicon film
56
during etching of the silicon oxide film
54
for forming the contact window
66
, it is necessary to make the silicon oxide film
54
very thin. For this purpose it is undesirable to make the silicon oxide film
54
thicker than 100 nm. Then, there arises another problem that a parasitic capacitance between the polysilicon film and the silicon surface of the substrate
50
becomes large because of shortness of the distance between the polysilicon film and the silicon surface.
JP-A 3-108755 (1991) proposes a method for lowering contact resistance in polysilicon resistors, and the proposal is applicable to the polysilicon resistor shown in FIG.
9
. In that case, contact windows
64
for the doped polysilicon film
56
are formed as shown in FIG.
9
. After that, the impurity used for doping the polysilicon film
56
is additionally introduced into the doped polysilicon film
56
through the contact windows
64
in order to produce a high impurity concentration layer adjacent to the bottom of each contact window
64
. After that, the contact windows
64
are lined with the barrier metal film
68
and filled with the contact metal
70
. Since the impurity concentration in the high impurity concentration layer is nearly constant, the contact resistance at the bottom of each contact window does not significantly vary. However, this method entails additional process steps. In introducing the additional dopant into the polysilicon film, it is necessary to mask several regions where diffused layers and conductive layers of the opposite conductivity are formed. Besides, this method does not solve the problem of parasitic capacitance attributed to the thinness of the silicon oxide film
54
under the polysilicon film
56
.
JP-A 61-222237 (1986) proposes another method for lowering contact resistance in polysilicon resistors.
FIGS. 10 and 11
show a polysilicon resistor according to JP-A 61-222237. This resistor is fundamentally similar to the resistor shown in
FIG. 9
, but contact windows are differently designed. In the case of
FIGS. 10 and 11
, contact windows
64
A for the polysilicon film
56
are made wider than the width of the rectangularly patterned polysilicon film
56
. In these contact windows
64
A, the contact metal
70
makes contact (via the barrier metal film
68
) with both the upper surface and side surfaces of the polysilicon film
56
. Therefore, the contact resistance becomes low. However, there is no difference in a variation in the thickness of the polysilicon film
56
under the contact windows
64
A, and the effect of the widened contact windows
64
A is relatively small when the resistor pattern of polysilicon film
56
is relatively large in width. Besides, the widening of the contact windows is of no effect on the parasitic capacitance between the polysilicon film and the silicon substrate.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a film resistor such as a polysilicon resistor, which is useful in semiconductor integrated circuits, is almost invariable in contact resistance, is small in parasitic capacitance and can be produced without substantially increasing process steps.
It is another object of the invention to provide a method of producing a film resistor which accomplishes the aforementioned object.
A film resistor according to the invention comprises a first dielectric film which lies on a semiconductor substrate, a resistor pattern of a resistive conductor film which is formed on the first dielectric film, a second dielectric film which lies on the first dielectric film and the resistor pattern, and a pair of contacts each of which comprises a contact window which is opened in the second dielectric film and the resistor pattern so as to reach the upper surface of the first dielectric film and a contact metal which fills the contact window and makes contact with the resistor pattern at side surfaces of the resistor pattern exposed in the contact window.
Preferably the aforementioned contact window is opened so as to intrude into the first dielectric film.
In preferred embodiments of the invention, the resistive conductor film is a polysilicon film doped with an impurity.
In this invention, each contact window for the resistor pattern of the conductor film penetrates the total thickness of the second dielectric film and the underlying conductor film. Accordingly in each contact window the contact between the contact metal and the conductor film occurs only at side surfaces of the conductor film exposed in the contact window. The contac
Crane Sara
Hayes Soloway Hennessey Grossman & Hage PC
NEC Corporation
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