Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Passive components in ics
Reexamination Certificate
1997-11-06
2001-02-06
Jackson, Jr., Jerome (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
Passive components in ics
C257S534000, C257S924000, C361S301400, C361S306200
Reexamination Certificate
active
06184567
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a film capacitor and a semiconductor device and a package carrying the same.
2. Description of the Related Art
A countermeasure for noise has become important as a semiconductor chip operates at a high speed and is highly integrated. Particularly, to reduce a noise originated from an electric power supply source, it is necessary to provide a capacitor between the power source and the ground. Generally, the capacitor is located outside the semiconductor device and far from the semiconductor chip in the prior art, and therefore, the countermeasure for noise is insufficient.
To solve this problem, a chip capacitor may be mounted, for example, on a front end of a lead of a lead frame.
If the chip capacitor is mounted on the front end of the lead frame, the distance from the semiconductor chip becomes shorter to reduce the noise.
However, it is troublesome to mount the chip capacitor to the front end of a thin lead frame, which therefore results in the increase in the production cost.
SUMMARY OF THE INVENTION
Accordingly, the present invention has been made to solve such problems in the prior art, and an object thereof is to provide a semiconductor device having a film capacitor, capable of being easily handled and mounted as well as effectively reducing a noise originated from an electric power supply source.
According to the present invention, there is provided a thin film capacitor comprising: a substrate having first and second surfaces; a first electrode film formed on the first surface of the substrate; a high-dielectric film formed on the first electrode film; a second electrode film formed on said high-dielectric film; and at least one external connection terminal formed on the second surface of the substrate opposite to the first surface on which the first electrode film is formed in such a manner that the external connection terminal is electrically connected to the first electrode film.
The external connection terminal may be a ball bump. By using external connection terminals such as ball bumps, it is possible to easily mount the film capacitor on the power source line and ground line of the lead frame while being connected to the power supply pad and the ground pad.
The thin film capacitor may further comprise a plated layer formed on the first surface of the substrate so that the first electrode film is formed on this plated layer.
It is possible to increase a breakdown voltage by forming a plated layer on a surface of the substrate to smooth the same and forming the first electrode layer thereon while eliminating pin holes therefrom.
The substrate may be made of at least one of iron alloy, copper, or copper alloy and the plated layer is a nickel film. Otherwise, the substrate is made of polyimide and the plated layer consists of a nickel plated layer and a chrome plated layer as an underlayer for the nickel plated layer.
By providing the plated layer on the surface of the substrate to smooth the same and forming the first electrode layer thereon, it is possible to eliminate pin holes from the first electrode layer and increase the breakdown voltage thereof.
According to another aspect of the present invention, there is provided a semiconductor package on which a semiconductor chip is to be mounted, the package comprising: a package body on which at least a power supply line and a ground line are formed; a thin film capacitor such as mentioned above; and the thin film capacitor is mounted on the package body in such a manner that the external connection terminal of the thin film capacitor is electrically connected to one of the power supply and ground lines.
According to still another aspect of the present invention, there is provided a semiconductor device comprising: a package comprising: a package body on which at least a power supply line and a ground line are formed; a thin film capacitor such as mentioned, the thin film capacitor is mounted on the package body in such a manner that the external connection terminal of the thin film capacitor is electrically connected to one of the power supply and ground lines; and a semiconductor chip having at least a power supply pad and a ground pad, the semiconductor chip being mounted on the package in such a manner that the second electrode of the thin film capacitor is electrically connected to one of the power supply and ground pads; and a sealing material hermetically sealing the semiconductor chip on the package.
In this case, if the semiconductor chip is mounted onto the package by a flip-chip connection therewith so that the film capacitor is located within a gap between the semiconductor chip and the package, the space efficiency is enhanced.
According to a still further another aspect of the present invention, there is provided an integrated semiconductor element comprising: a semiconductor chip having at least a power supply pad and a ground pad; a thin film capacitor such as mentioned above; and the thin film capacitor is mounted on the semiconductor chip in such a manner that the external connection terminal of the thin film capacitor is electrically connected to one of the power supply and ground pads.
Another type of thin film capacitor comprises: a substrate having first and second surfaces; a first electrode film formed on the first surface of the substrate; a high-dielectric film formed on the first electrode film; a second electrode film formed on said high-dielectric film; first and second external connection terminals formed on the second surface of the substrate opposite to the first surface on which the first electrode film is formed in such a manner that the first and second external connection terminals are electrically connected to the first and second electrode films, respectively.
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Parisi, J. “Decoupling Capacitor Placement”, IBM Technical Disclosure Bulletin, vol. 19, No. 8, Jan. 1977, pp. 3046-3047.
Fujisawa Akira
Ihara Yoshihiro
Kobayashi Tsuyoshi
Shibamoto Tsuyoshi
Watanabe Shoji
Eckert II George C.
Jackson, Jr. Jerome
Pennie & Edmonds LLP
Shinko Electric Industries Co. Ltd.
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