Data processing: database and file management or data structures – Database design – Data structure types
Reexamination Certificate
1998-12-24
2002-01-29
Black, Thomas (Department: 2171)
Data processing: database and file management or data structures
Database design
Data structure types
C707S793000, C710S013000, C713S152000, C200S339000, C379S350000
Reexamination Certificate
active
06343300
ABSTRACT:
BACKGROUND OF THE INVENTION
This invention relates to a file updating method used in an input/output control device in updating an operation file from a current operation file into a new operation file and, in particular, to an input/output control device for updating an operation file without interrupting online processing for a plurality of external processing requests.
An input/output control device responsive to a plurality of external processing requests for executing online processing often comprises two input/output control devices for executing same processing in preparation for occurrence of a system failure. One of the two input/output control devices is continuously operated as a current system. Upon occurrence of a failure in the current system, processing is handed over or inherited to a spare system so as to prevent interruption of the online processing. In the above-mentioned approach, however, it is necessary to inherit data before occurrence of the failure so as to enable the spare system to inherit the processing. If the failure in the current system is critical, it is impossible to inherit the processing before occurrence of the failure. In addition, since the spare system is activated after occurrence of the failure, it takes a time before restart of the processing.
Therefore, in case of an exchange system required to perform online and realtime processing, it is effective to make the two input/output control devices simultaneously perform the same processing. Specifically, the two input/output control devices are simultaneously operated, one as the current system which effectively perform input/output control for an external apparatus, the other as the spare system which performs input control but is not authorized to perform output control. Upon occurrence of the failure in the current system, the processing can be inherited simply by switching the output control because the spare system performs the same processing. Thus, the realtime processing is not interrupted so that the system is stable and reliable.
In the electronic exchange operated as mentioned above, it is sometimes required to update an operation file from a current operation file to a new operation file in order to offer a new service to customers during operation of the exchange system. In such a case, if the exchange is entirely suspended to update the operation file, an exchange operation is interrupted to cause troubles in system operation. In addition, when the processing is restarted with the new operation file, the data upon operation must be supplied again. In view of the above, it is desired to provide a novel input/output control device capable of updating the operation file without interrupting the exchange operation and with the data inherited. For example, Japanese Unexamined Patent Publication (JP-A) No. 8-242474 proposes a digital private exchange which carries out such a file update operation.
FIG. 1
schematically shows a structure of a processor unit in the private exchange. The processor unit
21
comprises a first processor
22
and a second processor
24
connected to a first memory
23
and a second memory
25
corresponding thereto, respectively. These components form a dual processor system in preparation for occurrence of a failure. The first and the second processors
22
and
24
share a shared memory
26
for transferring data therebetween. Typically, the first processor
22
is operated as a current system to control an entirety of the private exchange while the second processor
24
is operated as a spare system. Through the shared memory
26
, information about every call from a telephone set not shown in the figure is transferred so as to maintain synchronization in exchange operation. The processor unit
21
is connected to a storage medium
27
for storing an update program for updating an operation file from a current operation file to a new operation file.
Next, description will be made about the file update operation executed by the private exchange. The private exchange is in a normal operation state by the use of the current system and the spare system. Both of the current and the spare system are responsive to the external processing requests to perform processing with the current operation file. If a file update request is issued to the private exchange, at first the second processor
24
is separated from the online processing to be put into an offline state. Then, the new operation file is loaded from the storage medium
27
to the second memory
25
in the spare system. On the other hand, the first processor
22
in the current system continuously performs the processing with the current operation file in response to the external processing requests. Since the exchange operation is performed by the first processor
22
alone, status data upon operation which are changed due to the processing with the current operation file are stored in the first memory
23
alone.
When the new operation file is loaded in the second memory
25
, initialization is carried out in order to start the processing with the new operation file. After completion of the initialization, the status data stored in the first memory
23
are copied through the shared memory
26
into the second memory
25
. When the status data are copied into the second memory
25
, the second processor
24
is switched from the spare system into the current system. Thus, it is possible to carry out the file update operation without suspending the entirety of the exchange and to restart the processing with the new operation file by straightforwardly inheriting the status data in the current operation file.
In the above-mentioned file update operation in the private exchange, the status data in the current operation file are directly copied from the first memory
23
in order that the second processor
24
starts the processing with the new operation file. If the new operation file requires modification of a data structure of the status data in the current operation file, it is necessary to perform abstraction of the status data by the use of a predetermined abstraction syntax and to perform syntax analysis in the new operation file in order to inherit the status data in the current operation file by the new operation file. In addition, development of the new operation file inevitably depends upon the structure of the status data. Therefore, the new operation file is so increased in program scale that the development is difficult to result in decrease in productivity.
In the conventional electronic exchange, the dual processor system of a synchronous type is formed so that the current system and the spare system can not execute processing independently from each other. Therefore, in the exchange of this type, the spare system is loaded with the new operation file and then the online processing by the current system is interrupted to perform restart initialization for restarting the processing with the new operation file. After completion of the restart initialization, the processing with the new operation file is started. In this approach, the exchange operation is unfavorably interrupted while the restart initialization is performed on the side of the new operation file.
In view of the above, Japanese Unexamined Patent Publication (JP-A) No. 5-81218 proposes an input/output control device comprising a signal distributor and capable of updating the operation file without interrupting the online processing. The signal distributor serves to distribute external signals to the current and the new operation files so that the file update operation is carried out without interrupting the online processing.
FIG. 2
shows one example of the input/output control device proposed in the above-mentioned publication. A first processor
32
and a second processor
34
forms a dual processor system in preparation for occurrence of a failure. Typically, the first processor
32
serves as a current system while the second processor
34
serves as a spare system. A first external memory
33
and a second external m
Black Thomas
Ostrolenk Faber Gerb & Soffen, LLP
Rones Charles L.
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