Electric lamp and discharge devices – Discharge devices having a thermionic or emissive cathode
Reexamination Certificate
1998-06-30
2001-03-20
Patel, Nimeshkumar D. (Department: 2879)
Electric lamp and discharge devices
Discharge devices having a thermionic or emissive cathode
C313S309000, C313S336000, C313S351000, C313S495000
Reexamination Certificate
active
06204596
ABSTRACT:
FIELD OF USE
This invention relates to electron-emitting devices. More particularly, this invention relates to structures and manufacturing techniques for field-emission devices (or field emitters) suitable for products such as cathode-ray tubes of the flat-panel type.
BACKGROUND ART
A field-emission cathode is an electronic device that emits electrons when subjected to an electric field of sufficient strength. The electric field is created by applying a voltage between the cathode and an electrode, typically referred to as the anode or gate electrode, situated a short distance away from the cathode. Field emitters are employed in cathode-ray tubes of flat-panel televisions.
Yoshida et al, U.S. Pat. No. 5,164,632, discloses a field-emission structure in which solid elongated gold electron-emissive elements are situated in pores extending through an alumina (aluminum oxide) layer. An address line lying under the alumina layer contacts the lower ends of the electron-emissive elements. Their upper ends are pointed. A gate electrode situated above the electron-emissive elements extends slightly into the pores.
To manufacture their field-emitter structure, Yoshida et al anodically oxidize part of an aluminum plate to create a thin alumina layer having pores that extend nearly all the way through the alumina. An electrolytic technique is used to fill the pores with gold for the electron-emissive elements. The address line is formed over the filled pores along the alumina side of the structure after which the remaining aluminum and part of the adjoining alumina are removed along the opposite side of the structure to re-expose the gold in the pores. Part of the re-exposed gold is removed during an ion-milling process utilized to sharpen the electron-emissive elements. Gold is then evaporatively deposited onto the alumina and partly into the pores to form the gate electrode.
Greene et al, U.S. Pat. No. 5,150,192, discloses a field emitter in which hollow elongated electron-emissive elements extend through a thin electrically insulating substrate. The electron-emissive elements have pointed tips that protrude into cavities provided along the upper substrate surface below a gate electrode. A metal film lies along the lower substrate surface.
In fabricating their field emitter, Greene et al create openings partway through the substrate by etching through a mask formed on the bottom of the substrate. Metal is deposited along the walls of the openings and along the lower substrate surface. A portion of the thickness of the substrate is removed along the upper surface. The gate electrode is then formed by a deposition/planarization procedure. The cavities are provided along the upper substrate surface after which the hollow metal portions in the openings are sharpened to complete the electron-emissive elements.
A large-area field emitter for an application such as a flat-panel television screen where the diagonal screen dimension is 25 cm needs a relatively strong substrate for supporting the field-emission components extending across the large emitter area. The requisite substrate thickness is typically several hundred microns to 10 mm or more. Due to the ways in which Yoshida et al and Greene et al manufacture their field emitters, it would be quite difficult to attach those emitters to substrates of such thickness. Consequently, Yoshida et al and Greene et al are not suited for scaling up to large-area field-emission applications.
Busta, “Vacuum Microelectronics-1992
,” J. Micromech. Microeng
., Vol. 2, 1992, pp. 43-74, provides a general review of field-emission devices. Among other things, Busta discusses Utsumi, “Keynote Address, Vacuum Microelectronics: What's New and Exciting,”
IEEE Trans. Elect. Dev
., October 1990, pp. 2276-2283, who suggests that a filament with a rounded end is the best shape for a field-emission element. Busta also discusses Betsui, “Fabrication and Characteristics of Si Field Emitter Arrays,”
Tech. Dig. IVMC
91, 1991 pp. 26-29, who utilizes a lift-off technique in forming a field-emitter array. Also of interest is Fischer et al, “Production and use of nuclear tracks: imprinting structure on solids,”
Rev. Mod. Phys
., October 1983, pp. 907-948, which deals with the use of charged-particle tracks in manufacturing field emitters according to a replica technique.
GENERAL DISCLOSURE OF THE INVENTION
The present invention furnishes an efficient, reliable field-emission structure fabricated according to a simple, accurate, and easily controllable process. The invention utilizes electrically conductive filaments as electron-emissive elements. Each filament is an elongated solid body whose length is considerably greater than its maximum transverse dimension. A self-aligned gate electrode is typically employed with the filaments.
More specifically, a lower electrically conductive region is situated over electrically insulating material of a substrate that provides support for the structure, especially when the lower conductive region includes a group of generally parallel lines. A porous electrically insulating layer lies over the lower conductive region. A multiplicity of electron-emissive filaments occupy corresponding pores extending through the porous layer. The lower end of each filament contacts the lower conductive region.
When a gate electrode is incorporated into the field emitter, the gate electrode is implemented with a patterned electrically conductive gate layer that lies over the porous insulating layer. Openings extend through the gate layer at locations centered on the filaments in such a manner that the filaments are separated from the gate layer. Cavities are normally provided in the porous layer along its upper surface at locations likewise centered on the filaments. The cavities extend partway through the porous layer. Each cavity is wider than the corresponding pore so that each filament protrudes from its pore into the corresponding cavity.
In manufacturing the field-emission structure of the invention, the porous layer is formed over the lower conductive region with pores extending fully through the porous layer. The pores are preferably created by etching charged-particle tracks formed through an electrically insulating layer situated over the lower conductive region. As a result, the pores are distributed at random locations relative to one another.
Electrically conductive filament material is subsequently introduced into the pores to form the electron-emissive filaments. This step is preferably done by electrochemically depositing the filament material into the pores starting from the lower conductive region. Due to the selective nature of the electrochemical deposition, filaments are created only in pores lying over the lower conductive region.
In one aspect of the manufacturing process, the gate layer is subsequently provided over the porous layer in a self-aligned manner. Two procedures are available for creating the gate layer in this way. In both procedures, electrically conductive caps are provided over the upper ends of the filaments. Each cap is formed over a corresponding one of the filaments and has a lateral periphery that encloses the lateral periphery of the corresponding filament along the bottom of the cap. An electrochemical deposition technique is preferably utilized to create the caps in this manner so that they are self-aligned to the filaments.
One of the procedures involves removing part of the thickness of the porous layer. Electrically conductive gate material is deposited over the remainder of the porous layer into the space generally below the space between the caps. The caps shield the underlying portions of the porous layer so as to substantially prevent the gate material from accumulating on the portions of the porous layer located below the caps. Some of the gate material invariably accumulates on the caps during the deposition. The caps are then lifted off along with any of the gate material on the caps. The remainder of the gate material forms the patterned gate layer.
In the other procedure, the gate laye
Duboc, Jr. Robert M.
Macaulay John M.
Searson Peter C.
Spindt Christopher J.
Candescent Technologies Corporation
Haynes Mack
Meetin Ronald J.
Patel Nimeshkumar D.
Skjerven, Morrill, MacPherson, Franklin & Friel LLP
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