FIFO with adaptable flags for changing system speed requirements

Details FIFO with adaptable flags for changing system speed requirements FIFO with adaptable flags for changing system speed requirements

1994-09-08

1996-04-16

Wambach, Margaret Rose

Communications: electrical

Digital comparator systems

36518907, 377 39, 327 64, H03K 522

Patent

active

055086799

ABSTRACT:
Difference flag logic suitable for use in a FIFO memory is modified to quickly generate FIFO flag status through the use of programmable, resettable counters which eliminate the need for subtractor circuitry. A comparator is used to compare a value from a read counter with a value from a write counter. The subtractor function is replaced by offsetting the read count from the write count by a value equal to the desired FIFO flag value. Offset of the read count from the write count is accomplished by utilizing counters which provide programmable resettability. Use of programmable, resettable counters allows FIFO flag values to be chosen and implemented very easily. For instance, it is possible for a user to change from an almost full FIFO flag to a half full FIFO flag without changing any hardware at all. The counters are simply programmed and reset accordingly.

REFERENCES:
patent: 4935719 (1990-06-01), McClure
patent: 5084841 (1992-01-01), Williams et al.
patent: 5311475 (1994-05-01), Huang
patent: 5381126 (1995-01-01), McClure

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