Field programmable logic array circuit

Details Field programmable logic array circuit Field programmable logic array circuit

1981-07-30

1983-12-20

Yusko, Donald J.

Communications: electrical

Continuously variable indicating

With meter reading

307465, 34082583, H04Q 900

Patent

active

044220723

ABSTRACT:
A field-programmable logic array (FPLA) circuit of both the single level logic type containing a programmable AND/NAND gate array and the multiple level logic type containing a programmable OR/NOR gate array responsive to data from a programmable AND/NAND gate array has the programmable capability for enabling certain device pins to switch between functioning as data output pins and data input pins. A sequential logic FPLA circuit containing the basic elements of the multiple level logic device has a plurality of JK flip-flops for on-chip data storage. Selected flip-flops may be directly loaded from pins also operable for supplying output data, may be dynamically converted to function as D-type flip-flops, or may be asynchronously preset/reset to desired logic states. These features are all controllable through on-chip programmable circuitry.

REFERENCES:
patent: 4064493 (1977-12-01), Davis
patent: 4124899 (1978-11-01), Birkner et al.
patent: 4207556 (1980-06-01), Sugiyama et al.
patent: 4267463 (1981-05-01), Mayumi
"Programmable Logic Array Logic Enhancement", Brickman et al., IBM Technical Disclosure Bulletin, vol. 19, No. 2, Jul. 1976 p. 583.
"Array Logic Processing", Elliott et al., IBM Technical Disclosure Bulletin vol. 16, No. 2, Jul. 1973, pp. 586, 587.
E. Hnatek, A User's Handbook of Semiconductor Memories, (John Wylie and Sons, .COPYRGT.1977) Chap. 4, "The Read-Only Memory (ROM) and the Programmable Logic Array (PLA) pp. 182-356, pp. 308-335 enclosed.
L. Ewald et al., "Fusible Link Device"IBM Tech. Discl. Bull., vol. 19, No. 8, Jan. 1977, pp. 3089-3090.
J. Radcliffe, "Fusable Diode Array Circuits," IBM Tech. Discl. Bull. vol. 21, No. 1, Jun. 1978, pp. 105-108.
Signetics 82S102/103 and 82S100/101 FPLA's described in Signetics Bipolar & MOS Memory Data Manual, Signetics Corp., Mar. 1978.
Signetics 82S104/105 FPLA's described by R. Cline in "A Single-Chip Sequential Logic Element"1978 IEEE Int'l Solid-State Circuits Conf. Dig. of Tech Papers, 15-17 Feb. 1978, pp. 204-205.
Bipolar LSI Data Book, Monolithic Memoriesk Inc., 1978, pp. 6-1-6-32.

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