Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – With particular signal path connections
Reexamination Certificate
2000-03-07
2001-12-04
Munson, Gene M. (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Gate arrays
With particular signal path connections
C257S295000, C257S369000, C326S041000
Reexamination Certificate
active
06326651
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a configurable cellular array of dynamically configurable logic elements, such arrays being generally known as a field-programmable gate array (FPGA). More particularly, the present invention relates to an FPGA including: first and second basic cells, each having a plurality of logic circuits; and a program element for connecting/disconnecting the first and second basic cells to/from each other responsive to a program externally input and storing thereon the connection or disconnection state between these cells. The present invention also relates to a method for fabricating such an FPGA.
An FPGA includes: a gate array, in which a multiplicity of basic cells, each having a plurality of logic circuits, are arranged to form a regular pattern: and an interconnection area, in which a plurality of interconnection lines are arranged to interconnect the basic cells together. In the FPGA, the connection or disconnection state of a line interconnecting a pair of basic cells is determined by a program element, which is controlled by a program.
Various types of program elements are known in the art. Examples of program elements include non-programmable types like anti-fuses, and programmable types like EEPROMs and EPROMS. Although EEPROMs and EPROMs are programmable a limited number of times (hereinafter, referred to as “programmability-limited program elements”), a program element disclosed in Japanese Laid-Open Publication No. 10-4345 is programmable any arbitrary number of times (hereinafter, referred to as “programmability-unlimited program elements”). The program element disclosed in this document includes: an SRAM; and a nonvolatile ROM for storing thereon logic synthesis data.
The non-programmable program elements and programmability-limited program elements can advantageously retain logic synthesis data even after the power has been turned OFF. But the program elements of these types are programmable just a limited number of times. In addition, although these program elements require the application of a high voltage to write data thereon, the resulting write speed is low. For example, a data write speed enabled by an EEPROM or EPROM is on the order of several milliseconds.
On the other hand, the program elements of the type disclosed in Japanese Laid-Open Publication No. 10-4345 are programmable an arbitrary number of times and data can be written thereon at a high speed, because the data stored on a ROM is written onto an SRAM. However, since the program element of this type uses the SRAM, data should be read out from the ROM every time the power is turned ON. Moreover, it is impossible to write logic synthesis data, other than the counterpart written on the ROM, onto the SRAM.
SUMMARY OF THE INVENTION
An object of the present invention is providing a field-programmable gate array, which includes a nonvolatile memory device retaining logic synthesis data thereon even after the power has been turned OFF and which is still programmable at a high speed with a low voltage applied, and a method for fabricating the same.
To achieve this object, a first exemplary field-programmable gate array according to the present invention includes: first and second basic cells, each of which includes a plurality of logic circuits and is formed on a semiconductor substrate; and a program element for connecting/disconnecting the first and second basic cells to/from each other responsive to a program externally input and for storing thereon the connection or disconnection state between the first and second cells. The program element includes: a switching device, which is formed on the semiconductor substrate and turns ON/OFF to connect/disconnect the first and second basic cells to/from each other; and a nonvolatile memory device for storing thereon the ON/OFF states of the switching device. The memory device includes: a lower electrode; a capacitive insulating film made of a ferroelectric thin film; and an upper electrode. An interlevel insulating film is formed over the first and second basic cells and the switching device. A buffer layer for matching a lattice constant of the interlevel insulating film with that of the ferroelectric thin film is formed on the interlevel insulating film. And the nonvolatile memory device is formed on the buffer layer.
In the first field-programmable gate array, the program element includes: a switching device turning ON/OFF to connect/disconnect the first and second basic cells to/from each other; and a nonvolatile memory device, which stores thereon the ON/OFF states of the switching device and includes a lower electrode, a capacitive insulating film made of a ferroelectric thin film, and an upper electrode. Accordingly, the connection/disconnection states between the first and second basic cells can be stored in a nonvolatile manner. In addition, the power required for programming can be drastically cut down and the programming time can also be shortened to the order of several hundred nanoseconds.
Moreover, a buffer layer for matching a lattice constant of the interlevel insulating film with that of the ferroelectric thin film is interposed between the interlevel insulating film and the nonvolatile memory device to improve the crystallinity of the ferroelectric thin film. Accordingly, the capacitive insulating film can be made of a ferroelectric thin film of improved quality, and therefore, the performance of the nonvolatile memory device can be enhanced.
To accomplish the above object, a second exemplary field-programmable gate array according to the present invention includes: first and second basic cells, each of which includes a plurality of logic circuits and is formed on a semiconductor substrate; and a program element for connecting/disconnecting the first and second basic cells to/from each other responsive to a program externally input and for storing thereon the connection or disconnection state between the first and second cells. The program element includes: a switching device, which is formed on the semiconductor substrate and turns ON/OFF to connect/disconnect the first and second basic cells to/from each other; and a nonvolatile memory device for storing thereon the ON/OFF states of the switching device. The memory device includes: a lower electrode; a capacitive insulating film made of a ferroelectric thin film; and an upper electrode. An interlevel insulating film is formed over the first and second basic cells and the switching device. An anti-diffusion layer is formed on the interlevel insulating film to prevent metal atoms in the ferroelectric thin film from diffusing into the interlevel insulating film. And the nonvolatile memory device is formed on the anti-diffusion layer.
In the second field-programmable gate array, the program element includes: a switching device turning ON/OFF to connect/disconnect the first and second basic cells to/from each other; and a nonvolatile memory device, which stores thereon the ON/OFF states of the switching device and includes a lower electrode, a capacitive insulating film made of a ferroelectric thin film, and an upper electrode. Accordingly, the connection/disconnection states between the first and second basic cells can be stored in a nonvolatile manner. In addition, the power required for programming can be drastically cut down and the programming time can also be shortened to the order of several hundred nanoseconds.
Moreover, an anti-diffusion layer for preventing metal atoms in the ferroelectric thin film from diffusing into the interlevel insulating film is formed between the interlevel insulating film and the nonvolatile memory device. Accordingly, even if the capacitive insulating film is formed to have its quality improved by depositing the ferroelectric thin film at an elevated temperature, the metal atoms contained in the ferroelectric thin film do not diffuse into the interlevel insulating film. Thus, it is possible to prevent the electrical characteristics of a transistor, which is a unit component of the first or second basic ce
Matsushita Electric - Industrial Co., Ltd.
Munson Gene M.
Nixon & Peabody LLP
Robinson Eric J.
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