Field programmable gate array with direct input/output connectio

Details Field programmable gate array with direct input/output connectio Field programmable gate array with direct input/output connectio

1993-03-26

1994-05-10

Hudspeth, David R.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307443, H03K 19177

Patent

active

053110803

ABSTRACT:
A field programmable gate array that includes a dedicated path that directly connects an I/O pad to a selected register in the array of programmable function units. For example, a direct connection (i.e., without a configurable interconnect point) is provided from an I/O pad, through an input driver, to the input of a selected register in a given PFU. Either this same path, or alternatively a different path, may be used to directly connect a register output from a given PFU to an I/O pad, through an output driver. This technique avoids the need for special I/O registers in the programmable input/output cells, thereby increasing the flexibility of use and ease of design of the FPGA.

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patent: 4870302 (1989-09-01), Freeman
"XC4000 Logic Cell.TM. Array Family", Product Description, Dec. 1991, pp. 1-19.
"A New Architecture for High-Performance FPGAs", Second International Workshop on Field Progammable Logic and Applications, Vienna, Austria, Aug. 31, 1992, pp. 1-8.
"A Fully Configurable Versatile Field Programmable Function Element", D. D. Hill, Case 2, Ser. No.: 07/679,370, Filed On: Apr. 2, 1991, pp. 1-20.
"Low-Skew Signal Routing in a Programmable Array", B. K. Britton, D. D. Hill, W. A. Oswald, Case 1-4-1, Ser. No.: 07/971,502, Filed On: Nov. 4, 1992, pp. 1-16.
"FPGA With Distributed Switch Matrix", B. K. Britton, D. D. Hill, W. A. Oswald, Case 2-5-2, Ser. No.: 08/019963, Filed On: Feb. 19, 1993, pp. 1-15.

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