Field programmable gate array (FPGA) multi-parallel structure

Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – With particular signal path connections

Reexamination Certificate

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C438S197000

Reexamination Certificate

active

07667246

ABSTRACT:
A method of forming a field programmable gate array (FPGA) structure of a semiconductor device capable of reducing manufacturing cost through simpler processes includes forming a contact parallel connection structure in which contacts connected to a gate electrode and a source/drain by way of a first amorphous silicon pattern are connected in parallel with each other; forming a via parallel connection structure in which vias, connected to neighboring metal interconnections by a second amorphous silicon pattern, are connected in parallel with each other at a position not overlapping the contact parallel connection structure; and forming a connection means for connecting the contact parallel connection structure to the via parallel connection structure.

REFERENCES:
patent: 5329153 (1994-07-01), Dixit
patent: 2002/0050625 (2002-05-01), Cutter et al.

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