Field programmable device with internal dynamic test circuit

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371 51, G06F 1122

Patent

active

044293887

ABSTRACT:
A field programmable device comprising a memory cell part and a plurality of test bit rows provided along bit lines of the memory cell part and/or a plurality of test word rows provided along word lines of the memory cell part. At least one of the rows of the test bit and/or test word rows is written-in with a write-in ratio different than those of the other test bit and/or test word rows.

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patent: 4312067 (1982-01-01), Shirasaka
patent: 4320507 (1982-03-01), Fukushima et al.

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