Field programmable device with circuitry for detecting poor insu

Details Field programmable device with circuitry for detecting poor insu Field programmable device with circuitry for detecting poor insu

1981-12-23

1984-07-10

Smith, Jerry

Excavating

365201, G06F 1122

Patent

active

044596944

ABSTRACT:
A field programmable device comprises regular word lines, regular bit lines, regular memory cells connected at the intersections of the regular word lines and the regular bit lines, at least one test word line adjacent to one of the regular bit lines, and alternately arranged conducting and nonconducting test memory cells arranged at the intersections of the test bit lines and the regular word lines. According to the invention, for the purpose of determining poor insulation between the word lines, the test bit line and the regular word line are insulated by an insulating layer in each nonconducting test memory cell.

REFERENCES:
patent: 3995215 (1976-11-01), Chu et al.
patent: 4055802 (1977-10-01), Panousis et al.
patent: 4254477 (1981-03-01), Hsia et al.
patent: 4301535 (1981-11-01), McKenny et al.
patent: 4320507 (1982-03-01), Fukushima et al.
patent: 4389715 (1983-06-01), Eaton, Jr. et al.
Schuster, IEEE Journal of Solid-State Circuits, "Multiple Word/Bit Line Redundancy for Semiconductor Memories", vol. SC-13, No. 5, Oct. 1978, pp. 698-703.

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