Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Including dielectric isolation means
Patent
1997-04-18
2000-06-06
Prenty, Mark V.
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
Including dielectric isolation means
257607, H01L 2900
Patent
active
060722266
ABSTRACT:
A method for forming a field isolation structure and an improved field isolation structure are provided. The method includes forming a field oxide on a silicon substrate using an ozone enhanced local oxidation of silicon (LOCOS) process. Following formation of the field oxide a surface topography of the field oxide is sloped or tapered by ion milling, dry etching, reactive ion etching or chemical mechanical planarization. With an ozone enhanced LOCOS process, oxidation rates are increased and stress between the field oxide and substrate are reduced. This permits the formation of field isolation structures with reduced lateral encroachment and a smaller bird's beak area. In addition, the sloped topography of the field oxide permits a subsequently deposited conductive layer (e.g., polysilicon) to be etched without the formation of conductive stringers. During the etch process the active areas on the substrate can be protected with a sacrificial oxide or by only partially removing the LOCOS mask.
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Gonzalez Fernando
Moore John T.
Rolfson J. Brett
Thakur Randhir P. S.
Gratton Stephen A.
Micro)n Technology, Inc.
Prenty Mark V.
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