Field emission-type electron source and method of biasing...

Electric lamp and discharge devices: systems – Plural power supplies – Plural cathode and/or anode load device

Reexamination Certificate

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C315S169300

Reexamination Certificate

active

06784621

ABSTRACT:

CROSS REFERENCE TO RELATED APPLICATIONS
This application is based upon and claims the benefit of priority from Japanese Patent Application No. 2001-331470, the content of which is incorporated herein by reference in its entirety.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a field emission-type electron source including an electron source element for emitting electron beams by means of the field emission phenomenon and a method of biasing such a field emission-type electron source.
2. Description of the Prior Art
Heretofore, there has been known a field emission-type electron source (hereinafter referred to as “electron source”) including a lower electrode, a surface electrode (upper electrode) composed of a metal thin-film opposed to the lower electrode, and an electron transit layer interposed between the lower and surface electrodes. In this kind of electron source, when a certain voltage is applied between the lower and surface electrodes such that the surface electrode has a higher potential than that of the lower electrode, a resulting electric field between the electrodes induces the flow of electrons from the lower electrode to the surface electrode through the electron transit layer. After passing through the electron transit layer, the electrons are emitted through the surface electrode.
A conventional electron transit layer for use in this kind of electron source includes a strong-field drift layer (hereinafter referred to as “drift layer”) composed of an oxidized or nitrided porous polycrystalline silicon layer (see Japanese Patent Publication No. 2987140, as an example). There have also been known an electron source using an oxidized or nitrided monocrystalline silicon layer as the electron transit layer, and a MIM (Metal-Insulator-Metal) type electron source using an insulator layer as the electron transit layer (see Japanese Patent Laid-Open Publication No. 7-226146, as an example).
FIG. 15
shows one example of conventional electron sources having a drift layer. Referring to
FIG. 15
, an electron source
10
includes a drift layer
6
which is composed of an oxidized porous polycrystalline silicon layer (polycrystalline silicon layer transformed into a porous structure) and formed on a front surface of an n-type silicon substrate
1
as a conductive substrate through a non-doped polycrystalline silicon layer
3
. A surface electrode
7
composed of a metal thin-film (e.g. gold film) is formed on the drift layer
6
. An ohmic electrode
2
is formed on a back surface of the n-type silicon substrate
1
. The n-type silicon substrate
1
and the ohmic electrode
2
make up a lower electrode
12
. There has also been proposed an alternative electron source having the drift layer
6
formed directly on the front surface of the n-type silicon substrate
1
without interposing the polycrystalline silicon layer
3
between the n-type silicon substrate
1
and the drift layer
6
.
While the lower electrode
12
of the electron source
10
in
FIG. 15
is made up of the n-type silicon substrate
1
and the ohmic electrode
2
, an alternative electron source
10
has been proposed in which a lower electrode
12
of a metal material is formed on a front surface of an insulative substrate
11
composed, for example, of a glass substrate, as shown in FIG.
16
.
The electron source
10
in
FIG. 15
or
16
is operable to emit electrons through the following process. A collector electrode
21
is first positioned opposed to the surface electrode
7
. Then, a DC voltage Vps is applied between the surface electrode
7
and the lower electrode
12
such that the surface electrode
7
has a higher potential than that of the lower electrode
12
, while forming a vacuum space between the surface electrode
7
and the collector electrode
21
. Additionally, a DC voltage Vc is applied between the collector electrode
21
and the surface electrode
7
such that the collector electrode
21
has a higher potential than that of the surface electrode
7
. By appropriately setting the respective DC voltages Vps, Vc, electrons injected from the lower electrode
12
are drifted across the drift layer
6
, and then emitted through the surface electrode
7
. The one-dot chain lines in
FIG. 15
or
16
indicate the flow of the electrons e

emitted through the surface electrode
7
. The electrons reaching a front surface of the drift layer
6
can be considered as hot electrons. Thus, such electrons readily tunnel through the surface electrode
7
and emitted into the vacuum space.
Terms “diode current Ips” and “emission current (emission electron current) Ie” as used in the electron sources
10
generally mean a current flowing between the surface electrode
7
and the lower electrode
12
and a current flowing between the collector electrode
21
and the surface electrode
7
, respectively. In the electron sources
10
, a greater ratio of the emission current Ie to the diode current (Ie/Ips) provides higher electrode emitting efficiency. The above electron sources
10
is operable to emit electrons even if the DC voltage Vps to be applied between the surface electrode
7
and the lower electrode
12
is set in a low range of about 10 to 20 V, and the emission current Ie is increased as the DC voltage Vps is increased.
For example, the electron source
10
as shown in
FIG. 15
or
16
is applicable to an electron source for displays (see FIG.
12
).
In the conventional electron sources
10
, the drift layer
6
includes traps acting to capture electrons. Thus, some of electrons injected from the lower electrode
12
into the drift layer
6
are captured by the traps, which will reduce the diode current Ips and the emission current Ie with time, resulting in relatively short lifetime of the electron sources.
In this context, there has been proposed an electron-source biasing method in which an electric field having a polarity to be alternately inversed is applied between a lower electrode and a surface electrode to allow captured electrons in traps to be released and emitted (see the Japanese Patent Laid-Open Publication No. 7-226146, as an example). This electron source is a MIM type electron source including an upper electrode (the surface electrode) made of metal or highly-doped semiconductor, the lower electrode made of metal or highly-doped semiconductor, and an insulator layer interposed between the upper and lower electrodes. This electron source is operable to alternately inverse the polarity of a voltage to be applied between the upper and lower electrodes, so that some of electrons to be captured by a first trap formed in the insulator layer adjacent to the upper electrode and a second trap formed in the insulator layer adjacent to the lower electrode are moved between the first and second traps to facilitate effective emission of the electrons.
However, assuming that the biasing method disclosed in the Japanese Patent Laid-Open Publication No. 7-226146 is applied to the electron source
10
as shown in
FIG. 15
or
16
, even if an electron captured by a trap in the drift layer
6
is released from the trap, the released electron will be captured by another trap in the drift layer
6
. Thus, the diode current Ips and the emission current Ie will be undesirably reduced with time, and thereby adequate lifetime cannot be obtained.
Japanese Patent Laid-Open Publication No. 11-95716 discloses an electron source biasing method used in an image display device having the electron source elements in a matrix arrangement, in which after a scanning operation in each frame period, a reverse voltage is applied simultaneously to all of the electron source elements to allow captured electrons in traps to be released and emitted. This biasing method has the following problems.
(1) Regardless of whether a voltage has been applied to bias (or actuate) each of the electron source elements, the reverse bias voltage is applied simultaneously to all of the electron source elements in each frame period. Thus, a significant fluctuation will occur in resp

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