Active solid-state devices (e.g. – transistors – solid-state diode – Thin active physical layer which is – Low workfunction layer for electron emission
Reexamination Certificate
2002-07-22
2004-03-16
Lebentritt, Michael S. (Department: 2824)
Active solid-state devices (e.g., transistors, solid-state diode
Thin active physical layer which is
Low workfunction layer for electron emission
C257S213000, C257S295000, C257S629000, C257S798000
Reexamination Certificate
active
06707061
ABSTRACT:
TECHNICAL FIELD
The present invention relates to a field emission-type electron source arranged to emit an electron beam by using a semiconductor material according to field emission.
BACKGROUND ART
Conventionally, as a field emission-type electron source (which hereinbelow may be shortly referred to as an “electron source”), there is known a Spindt-type electrode disclosed in, for example, U.S. Pat. No. 3,665,241. The Spindt-type electrode includes a substrate and gate layers, in which a large number of trigonal-pyramid-shaped emitter chips are arranged on the substrate, and the gate layers are insulated from one-way emitter chips that have emission openings provided to expose end portions of the emitter chips. In the Spindt-type electrode, when a high voltage is applied in a vacuum to cause the emitter chips to be cathodic with respect to the gate layer, electron beams are emitted from the apexes of the emitter chips through the emission openings.
For the Spindt-type electrode, however, a manufacturing process is complicated, and it is difficult to manufacture a large number of the trigonal-pyramid-shaped emitter chips at high precision. As such, a problem arises in that it is difficult to implement area enlargement when the electrode is used for, for example, a flat emitting device and display. Moreover, in the Spindt-type electrode, since fields concentrate at the apex of the emitter chip, when a residual gas exists because the degree of a vacuum around the apex of the emitter chip is low, the residual gas is ionized by emitted electrons to be of anodic ion. Since the anodic ions impinge on the apex of the emitter chip, the apex of the emitter chip suffers damage (such as ion-impact-caused damage). For this reason, defects can easily occur to an extent that electron properties, such as the current density and emission efficiency, become unstable, and hence the service life of the emitter chip is reduced. To prevent the defects, the Spindt-type electrode needs to be used in a high vacuum (in a range of 10
−5
Pa to 10
−6
Pa). This arises problems, however, in that costs are increased, and in addition, handling becomes difficult.
For eliminating the defects described above to implement improvement, an electron source of a MIM (metal insulator metal) type and an electron source of a MOS (metal oxide semiconductor) type have been proposed. The former is a flat electron source that has a (metal)-(insulator film)-(metal) multilayered structure, and the latter is a flat electron source that has a (metal)-(oxide)-(film semiconductor) multilayered structure. To improve the emission efficiency (to cause many electrons to emit) in either of the electron sources of the aforementioned types, the film thickness of the film such as the insulator film or the oxygen film needs to be reduced. However, with the insulator film or the oxygen film of which the thickness is excessively reduced, when voltage is applied between upper and lower electrodes in the multilayered structure, dielectric breakdown can occur. Since the electrical breakdown needs to be prevented, the reduction in the insulating film or the oxygen film is limited. As such, a problem arises in that the electron emission efficiency (induction efficiency) cannot be increased so high.
Recently, as is disclosed in Japanese Unexamined Patent Application Publication No. 8-250766, an electron source (cold electron emission semiconductor device) has been proposed. The electron source is configured such that a monocrystalline semiconductor substrate such as a silicon substrate is used, a surface of the semiconductor substrate is anodic-oxidized, a porous semiconductor layer (porous silicon layer) is thereby formed, and a thin metal film is formed on the porous semiconductor layer. In the electron source, voltage is applied between the semiconductor substrate and the thin metal film to cause electrons to emit.
However, in the electron source proposed in Japanese Unexamined Patent Application Publication No. 8-250766, since the substrate is limited to be of a semiconductor, a problem arises in that it is difficult to implement the area enlargement and the cost reduction. In addition, a so-called popping phenomenon tends to occur in electron emission, and hence nonuniformity tends to occur in light emission. As such, in a state where the electron source is used with, for example, a flat emitting device or display, light-emission nonuniformity can occur.
In view of the above, with Japanese Patent Applications No. 10-272340 and No. 10-272342, the inventors proposed an electron source configured such that, a porous polycrystalline semiconductor layer (such as a porous polycrystalline silicon layer) is interposed between an electroconductive substrate and a thin metal film (surface electrode) by performing, for example, rapid thermal oxidation at 900° C. according to a rapid thermal oxidation (RTO) technique; and thereby, a strong field drift layer (which hereinbelow will be referred to as a “drift layer”) in which electrons injected from the electroconductive substrate drift is formed.
As shown in
FIG. 43
, in an electron source
10
′ of the aforementioned type, a drift layer
6
is formed on a main surface of an n-type silicon substrate
1
, which is an electroconductive substrate, in which the drift layer
6
is formed of an oxidized porous polycrystalline silicon layer. A surface electrode
7
made of a thin metal film is formed on the drift layer
6
. An ohmic electrode
2
is formed on a reverse surface of the n-type silicon substrate
1
. The thickness of the drift layer
6
is, for example, 1.5 &mgr;m.
As shown in
FIG. 44
, in the electron source
10
′, the surface electrode
7
is disposed to be exposed to a vacuum. A collector electrode
12
is disposed to oppose the surface electrode
7
. In the configuration, a direct-current voltage Vps is applied to cause the surface electrode
7
to be anodic with respect to the n-type silicon substrate
1
(ohmic electrode
2
). In addition, a direct-current voltage Vc is applied to cause the collector electrode
12
to be anodic with respect to the surface electrode
7
. Thereby, electrons injected from the n-type silicon substrate
1
into the drift layer
6
are caused to drift, and are discharged through the surface electrode
7
(each of single-dotted chain lines in
FIG. 44
shows the flow of an electron e
−
emitted through the surface electrode
7
). As such, a material having a small work function is preferably used for the surface electrode
7
. A current flowing between the surface electrode
7
and the ohmic electrode
2
is generally called a diode current Ips, and a current flowing between the collector electrode
12
and the surface electrode
7
is generally called an emitted electron current Ie. The greater the emitted electron current Ie with respect to the diode current Ips (Ie/Ips), the higher the electron emission efficiency. In the electron source
10
′, electrons can be emitted even when the direct-current voltage Vps to be applied between the surface electrode
7
and the ohmic electrode
2
is in a low range of from 10 to 20 V.
The electron source
10
′ enables electrons to be stably emitted at high electron emission efficiency without causing popping phenomenon since it has a less dependency to the degree of vacuum as an electron emission property.
As shown in
FIG. 45
, the drift layer
6
includes at least grain
51
(semiconductor crystal) made of columner polycrystalline silicon disposed on the main surface of the n-type silicon substrate
1
; a thin silicon oxide film
52
formed on a surface of the grain
51
; fine silicon crystal
63
on the order of nanometer that is interposed between items of the grain
51
; and a silicon oxide film
64
provided as an insulator film that is formed on a surface of the fine silicon crystal
63
and that has a thickness smaller than a crystal grain diameter of the fine silicon crystal
63
. That is, in the drift layer
6
, the surface of each item of the grain
51
becomes porous,
Aizawa Koichi
Baba Toru
Hatai Takashi
Honda Yoshiaki
Ichihara Tsutomu
Lebentritt Michael S.
Matsushita Electric & Works Ltd.
Menz Douglas M
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