Field emission element with antireflection film

Electric lamp and discharge devices – Electrode and shield structures – Point source cathodes

Reexamination Certificate

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C313S495000, C313S309000, C313S351000

Reexamination Certificate

active

06252340

ABSTRACT:

This application is based on Japanese patent application No. HEI 10-175195 filed on Jun. 22, 1998, all the contents of which are incorporated herein by reference.
BACKGROUND OF THE INVENTION
a) Field of the Invention
The present invention relates to a field emission element with antireflection film and a method of manufacturing a field emission element, and more particularly to a field emission element with a having a field emission cathode tip from which electrons are emitted, and a method of manufacturing a field emission element.
b) Description of the Related Art
A field emission element emits electrons from a sharp tip of an emitter (field emission cathode) by utilizing electric field concentration. For example, a flat panel display can be structured by using a field emitter array (FEA) having a number of emitters disposed in array. Each emitter controls the luminance of a corresponding pixel of the display.
FIGS. 16A
to
16
F illustrate a conventional manufacture method of a field emission element.
As shown in
FIG. 16A
, a conductive gate electrode film
62
is formed on a substrate
61
, and a resist pattern
63
having a predetermined shape is formed on the gate electrode film
62
through photolithography.
Next, by using the resist pattern
63
as a mask, the gate electrode film
62
is anisotropically etched to leave a gate electrode
62
a
with a gate hole
67
having a circular plan shape (as viewed from the upper shape), as shown in FIG.
16
B. This etching reduces the thickness of the resist pattern
63
so that a thin resist pattern
63
a
is left.
Next, as shown in
FIG. 16C
, after the resist pattern
63
a
is removed, a sacrificial film
64
is isotropically deposited on the surface of the gate electrode
62
a
and on the exposed surface of the substrate
61
.
Next, as shown in
FIG. 16D
, the sacrificial film
64
is anisotropically etched to leave a sacrificial film (side spacer)
64
a
on the inner wall of the hole
67
of the gate electrode
62
a,
the sacrificial film
64
a
reducing its opening diameter toward the substrate.
Next, as shown in
FIG. 16E
, an insulating film
65
is deposited on the whole substrate surface, and a conductive emitter electrode
66
is formed on the insulating film
65
.
Next, as shown in
FIG. 16F
, the whole of the substrate
61
and side spacer
64
a
and part of the insulating film
65
are etched and removed, leaving a peripheral insulating film
65
a
between the gate electrode
62
a
and emitter electrode
66
.
As a positive potential is applied to the gate electrode
62
a,
an electric field can be concentrated upon the tip of the emitter electrode (cathode)
66
so that electrons are emitted from the emitter electrode
66
toward an anode electrode (not shown).
The gate electrode
62
a
surrounds the gate hole
67
and is made of two parts (laterally separated regions) as viewed in section. A distance between these two parts in the horizontal direction is called a gate diameter. A voltage to be applied to the gate electrode
62
a
is determined by the gate diameter.
The resist pattern
63
having a predetermined shape shown in FIG.
16
A is formed through photolithography. First, a resist film (photosensitive resin) is formed on the whole surface of the gate electrode film
62
, and thereafter exposed and developed to form the resist pattern
63
having a predetermined shape.
It is not preferable if during the exposure, an amount of light reflected from the gate electrode film
62
under the resist film
63
is large. The gate electrode film
62
is made of metal or semiconductor having a low resistivity. However, metal and semiconductor has generally a large reflectance.
During the exposure, light passes through the resist film
63
and is reflected by the gate electrode film
62
so that an area not desired is also exposed. This reflected light becomes more influential particularly when the surface of the gate electrode film
62
has steps. In such a case, the resist pattern
63
after the development cannot have a desired shape. Therefore, if this resist pattern
63
is used as a mask and the etching process illustrated in
FIG. 16B
is performed, the gate electrode
62
a
having a desired pattern cannot be formed.
If the resist film
63
is a positive resist film, the gate electrode
62
a
is likely to have a compression or a disconnection, whereas if the resist film
63
is a negative resist film, the gate electrode
62
a
is likely to have a projection or a bridge.
The following problems also occur.
(1) Multiple interferences during exposure change with a thickness of the resist film
63
so that the sizes of gate electrodes have a variation.
(2) If there is a reflectance variation in gate electrode films
62
, the sizes of gate electrodes have a variation.
(3) Since a standing wave is generated in the resist film
63
, a resolution of the resist film
63
lowers.
(4) It is necessary to use a thick resist film
63
because an etching selection ratio of the resist film
63
a
to the gate electrode film
62
a
during the etching process (
FIG. 16B
) is low. For example, if the gate electrode film
62
has a thickness of 0.3 &mgr;m, it is necessary to use the resist film
63
having a thickness of 0.8 &mgr;m or more. If the resist film
63
is thick, the microloading effects become conspicuous and an etching precision, an etching uniformity, an etching throughput and an etched cross section are degraded.
From the above reasons, it is difficult to highly precisely form a gate electrode having a predetermined shape, and the precision of a gate diameter of the gate hole of the gate electrode
62
a
lowers. In a flat panel display having a number of field emission elements, a variation in gate diameters makes the characteristics of each field emission element different. Namely, the luminance of pixels of the display become irregular.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a manufacture method for a field emission element having a high precision of size.
It is another object of the present invention to provide a manufacture method for a field emission element with a gate hole having a high precision of size.
According to one aspect of the present invention, there is provided a field emission element comprising: a gate electrode having a first opening; an antireflection film formed on the gate electrode, the antireflection film having a second opening and a refractive index smaller than a refractive index of the gate electrode; an insulating film formed on the antireflection film, the insulating film having a third opening; and an emitter electrode formed on the insulating film, wherein the emitter electrode includes a peripheral portion supported on the insulating film and a projecting portion rising from the peripheral portion and projecting in the first to third openings, and the projecting portion includes a base portion being continuous with the peripheral portion and having at least an outer surface with a radius of curvature and a tip portion having a sharp cusp and an outer surface with a radius of curvature smaller than the radius of curvature of the outer surface of the base portion.
According to another aspect of the present invention, there is provided a field emission element comprising: a starting substrate; an anode electrode film formed on the starting substrate; a first sacrificial film formed on the anode electrode film and having a first opening; a gate electrode formed on the first sacrificial film and having a second opening; an antireflection film formed on the gate electrode and having a third opening; an insulating film formed on the antireflection film and having a fourth opening; and an emitter electrode formed on the insulating film and having a fifth opening, wherein the emitter electrode includes a peripheral portion supported on the insulating film and a projecting portion rising from the peripheral portion and projecting into the second to fourth openings, and the projecting portion includes a base portion being continuous with the peripheral portio

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