Electric lamp and discharge devices – Discharge devices having a multipointed or serrated edge...
Reexamination Certificate
1999-03-25
2002-09-03
Patel, Nimeshkumar D. (Department: 2879)
Electric lamp and discharge devices
Discharge devices having a multipointed or serrated edge...
C313S336000, C313S351000
Reexamination Certificate
active
06445113
ABSTRACT:
BACKGROUND OF THE INVENTION
This invention relates to a field emission cold cathode device which has a gate electrode and emitter electrodes to emit electrons from the emitter electrodes by generating an electric field between the gate and the emitter electrodes and a method of manufacturing the same.
In general, requirements have been directed to an effective electron source, in a very small vacuum tube or the like, which is used in a display device, or a high speed switching element. Conventionally, a thermionic electron emission device which emits thermionic electrons by heating a filament has been very often used as such an electron source. However, the thermionic electron emission device has shortcomings that it is objectionably large in energy loss and must be previously heated. Under the circumstances, a recent trend is directed to another electron source instead of the thermionic electron emission device.
In lieu of the thermionic electron emission device, proposals have been made about a field emission cold cathode device which can emit electrons without heating. An example of such field emission cold cathode device has a semiconductor substrate, an insulator layer on the semiconductor substrate, and a gate electrode formed on the insulator layer. Specifically, the gate electrode and the insulator layer are opened to form holes in which emitter electrodes are arranged in place in the form of emitter cones.
With this structure, electrons can be emitted from each top of the emitter cones by impressing an electric voltage between the gate and the emitter electrodes and by generating an electric field of high intensity.
Heretofore, a field emission cold cathode device is disclosed in Japanese Unexamined Patent Publication No. Hei. 8-166,846, namely, 106,846/1996 (will be called Reference 1 hereinafter). The disclosed field emission cold cathode device has a plurality of emitter cones formed within holes and surrounded by an insulator layer and a gate electrode for encircling the emitter cones. In addition, the gate electrode is surrounded by a groove or trench which is formed in the insulator layer placed at a peripheral portion of the gate electrode.
When an insulating material is buried into the trench with this structure, a leak current can be reduced which is caused to inevitably flow in each element of the field emission cold cathode device.
Alternatively, the present inventors have pointed out in the Japanese Unexamined Patent Publication No. Hei 10-50,201, namely, 50,201/1998 (will be referred to as Reference 2) that a strong electric field between the gate electrode and the emitter electrodes brings about a discharge between the gate electrode and the emitter electrodes during the electron emission even when the trench is formed around the gate electrode. Such a discharge gives rise to breakage of the emitter cones and the like and a large noise.
In order to avoid such a discharge, Reference 2 proposes to prevent a semiconductor substrate from becoming low in electric resistance by digging a trench on the semiconductor substrate right under the emitter cones and by filling the trench with an insulator material. Such a trench may be extended through the insulator layer deposited on the semiconductor substrate.
Moreover, Reference 2 also discloses a plurality of emitter cones partitioned into a block which is surrounded by an insulator material buried in the trench. At any rate, the field emission cold cathode device has a plurality of blocks which are arranged in rows and columns and each of which has a plurality of the emitter cones. In this connection, the field emission cold cathode device of the type mentioned above will be called a block type field emission cold cathode device. As mentioned above, each block may serve to prevent the electric resistance from being lowered and will be called a resistor block.
More specifically, the semiconductor substrate and the insulator layer on the semiconductor substrate are partitioned in Reference 2 into a plurality of blocks by trenches which are embedded by glass, such as BPSG (boro phospho silicate glass). Subsequently, gate electrodes are deposited on the blocks and a plurality of holes are opened on the gate electrodes and the insulator layer within each block. Emitter cones are thereafter formed in the holes to fabricate the block type field emission cold cathode device.
As a result, the gate electrodes surround the emitter cones and have gate electrode openings.
On the other hand, it is necessary to increase an amount of emitted electrons in the block type field emission cold cathode device. In other words, requirements have been made about increasing an emission current. Under the circumstances, it is preferable that the emitter cones are arranged in each block with a high density. Accordingly, a great number of holes are preferably opened in the resistor block and the gate electrodes within each resistor block at a small size with a narrow distance left between adjacent holes. Practically, such holes have sizes and distances both of which are very close to critical sizes and distances determined by a resolution of photolithography. For example, a recent requirement is to open, in each resistor block and gate electrode of ten &mgr;ms square, the holes which have diameters of 0.5 &mgr;m and which are arranged at the distance of 0.5 in rows and columns.
This structure makes it possible to arrange the emitter cones of about one hundred in each resistor block and to realize a large electric current. An increased electric current can be accomplished when a plurality of such resistor blocks are arranged in the form of an array.
As is apparent from the above, the holes should be precisely and finely delineated or formed on the insulator layer and the gate electrodes within each resistor block to accommodate the emitter cones in the holes. This means that the trenches embedded by the BPSG and the gate electrode openings within each resistor block must be also precisely located by the use of a fine processing technique, such as photolithography.
However, it is practically very difficult to precisely form each resistor block as it is designed, due to the resolution of photolithography and the like. This brings about a variation of emission currents emitted from the emitter cones in each resistor block and makes it difficult to obtain a uniform image.
More specifically, the block type field emission cold cathode device is usually manufactured by digging the trenches, by thereafter coating the BPSG, and by making the BPSG re-flow to fill the trenches with the BPSG and to consequently embed the BPSG into the trenches. In this event, the BPSG is inevitably deposited not only within the trenches but also on the other portions than the trenches. Accordingly, superfluous BPSG on the other portions than the trenches must be removed by an etch-back technique.
According to the inventors' experimental studies, it has been found out that trench surfaces of the BPSG embedded in the trenches are not completely flush with surfaces of the other portions after removal of the BPSG but are offset relative to the latter by 0.1 &mgr;m or so. Specifically, the former trench surfaces of the BPSG become lower than the other portions by 0.1 &mgr;m. This might result from a difference of material properties between the BPSG and the other portions.
When the insulator layer and the gate electrodes are deposited on the BPSG and the other portions with the offset left between the BPSG and the other portions, an inclination or slope is formed between the trench surfaces of the BPSG and edge portions of each resistor block covered with the insulator layer and the gate electrodes. As a result, it has been observed that the edge portions of each resistor block are heaped or raised up relative to the trench surfaces of the BPSG. Especially, when each resistor block has a contour of a polygonal configuration (for example, a square configuration) defined by vertexes and sides, the gate electrodes are highly raised up at the vertexes in comparison with th
Seko Nobuya
Tomihari Yoshinori
Guharay Karabi
NEC Corporation
Patel Nimeshkumar D.
Young & Thompson
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