Field effect transistors and fabrication of integrated circuits

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357 45, 357 49, 357 59, H01L 2978

Patent

active

040952517

ABSTRACT:
A field effect transistor (FET) wherein the field insulator is nonrecessed with respect to the source and drain regions, wherein the sides of the polysilicon gate electrode are self-aligned with respect to the nonconductive field insulator and neither overlap nor underlap the field insulator. The lateral dimensions and location of the gate correlate directly with the lateral dimensions and location of the channel region of the FET. The gate fabrication technique employed comprises delineating lithographic patterns twice in the same polysilicon layer; whereby the first lithographic pattern delineates regions to be used for sources and drains, and the next lithographic pattern forms the gate regions.

REFERENCES:
patent: 3936859 (1976-02-01), Dingwall

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