Field effect transistor with recessed buried source and drain re

Details Field effect transistor with recessed buried source and drain re Field effect transistor with recessed buried source and drain re

1994-06-06

1995-01-17

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 28, 437 29, 437 41, 437985, H01L 21265

Patent

active

053825349

ABSTRACT:
The invention describes recessed buried conductive regions formed in a trench in the substrate that provides a smooth surface topology, smaller devices and improved device performance. The buried regions have two conductive regions, the first on the trench sidewalls, the second on the trench bottom. In addition, two buried layers are formed between adjacent buried conductive regions: a threshold voltage layer near the substrate surface and an anti-punchthrough layer formed at approximately the same depth as the conductive regions on the trench bottoms. The first conductive region and the anti-punchthrough layer have the effect of increasing the punchthru voltage without increasing the threshold voltage. The first and second regions also lowers the resistivity of the buried regions allowing use of smaller line pitches and therefore smaller devices. Overall, the recessed conductive regions and the two buried layers allow the formation of smaller devices with improved performance.

REFERENCES:
patent: 4653177 (1987-03-01), Lebowitz et al.
patent: 4849367 (1989-07-01), Rouault et al.
patent: 5057444 (1991-10-01), Fuse et al.
patent: 5114865 (1992-05-01), Kimura
patent: 5118636 (1992-06-01), Hosaka
patent: 5156985 (1992-10-01), Yamada et al.
patent: 5292680 (1994-03-01), Lur et al.
patent: 5342794 (1994-08-01), Wei

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