Field effect transistor with plated heat sink on a fet chip

Details Field effect transistor with plated heat sink on a fet chip Field effect transistor with plated heat sink on a fet chip

1997-03-21

1999-07-20

Loke, Steven H.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Junction field effect transistor

257275, 257712, 257713, H01L 2980, H01L 31112, H01L 2334

Patent

active

059259019

ABSTRACT:
A GaAs substrate is divided at boundary regions of unit cells of FET chips. With such construction, magnitude of curling of the GaAs substrate due to a difference of thermal expansion coefficients between the GaAs substrate and the PHS upon heating during assembling, can be reduced. In a semiconductor device with a PHS, the magnitude of curling of the semiconductor substrate after assembling can be reduced by reducing stress upon assembling, without causing degradation of reliability.

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