Field effect transistor with improved withstand voltage characte

Details Field effect transistor with improved withstand voltage characte Field effect transistor with improved withstand voltage characte

1982-11-01

1987-03-17

Carroll, J.

357 2314, 357 42, 357 52, 357 54, 357 59, H01L 2978, H01L 2702, H01L 2934, H01L 2904

Patent

active

046511865

ABSTRACT:
A field effect transistor comprises a source region (42) annularly formed to encompass and spaced apart from a drain region (41), whereby a second channel region is formed between the drain region and the source region in the vicinity of the former, while a first channel region is formed in the remaining area thereof, an annular first gate (43) formed bridging above the first channel region and the source region, a second annular gate (45) formed bridging above the first gate and the drain region, and an isolating film (47) formed contiguous to the source region at the side opposite to the channel region. As a result any region is eliminated where the channel region in the vicinity of the drain side end of the first gate (43) is in contact with the isolating film (47). Accordingly, no withstand voltage is restricted thereby and the withstand voltage of the field effect transistor is considerably enhanced.

REFERENCES:
patent: 4229756 (1980-10-01), Sato et al.
patent: 4240195 (1980-12-01), Clemens et al.
patent: 4290077 (1981-09-01), Ronen
patent: 4308549 (1981-12-01), Yeh
patent: 4379343 (1983-04-01), Moyer
patent: 4380804 (1983-04-01), Lockwood et al.
patent: 4385308 (1983-05-01), Uchida
patent: 4414560 (1983-11-01), Lidow
patent: 4429237 (1984-01-01), Cranford, Jr. et al.
D. M. Erb et al., "Electron Gate Currents and Threshold Stability on the n-Channel Stocked Gate MOS Tetrode, IEEE Transactions on Electron Devices, vol. ED-18 (1971) pp. 105-109.

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