Field effect transistor with higher mobility

Active solid-state devices (e.g. – transistors – solid-state diode – Physical configuration of semiconductor – With specified crystal plane or axis

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257369, H01L 2904, H01L 31036

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active

057290458

ABSTRACT:
A method of increasing the performance of an FET device by aligning the wafer. The {100} silicon wafer and the image of a lithographic mask are rotated 45 cc.degree. relative to each other so that, instead of the conventional fabrication, the channel is aligned approximately parallel FET with only a minor modification in the lithographic process. The novel crystal direction.

REFERENCES:
patent: 3612960 (1971-10-01), Takeishi et al.
patent: 4558509 (1985-12-01), Tiwaru
patent: 4857986 (1989-08-01), Kinugawa
patent: 5386135 (1995-01-01), Nakazato et al.
patent: 5416736 (1995-05-01), Kosa et al.
Wolf Ph.D., Stanley and Tauber, Ph.D., Richard N.; Chapter 1, "Silicon: Single Crystal Growth and Wafer Preparation"; Silicon Processing for The VLSI Era; vol. 1: Process Technology; pp. 1-35; 1986 no month.

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