Patent
1981-12-01
1984-06-05
Edlow, Martin H.
357 4, 357 237, H01L 2978, H01L 2712, H01L 4500, H01L 4902
Patent
active
044531729
ABSTRACT:
An FET device comprises a substrate with source and drain regions separated by a gate structure. Between the gate and substrate is an insulator formed of a cubic fluorite structure material that is lattice matched within 1% to the substrate. The insulator may be a group II fluoride such as Ca.sub.y Cd.sub.1-y F.sub.2 (0.ltoreq.y.ltoreq.1), Sr.sub.z Ba.sub.1-z F.sub.2 (0.ltoreq.z.ltoreq.1), or Ba.sub.x Ca.sub.1-x F.sub.2 (0.ltoreq.x.ltoreq.1), or an oxide such as CeO.sub.2, PbO.sub.2. The substrate may be a bulk semiconductor or an epitaxial layer such as Si, InP, GaAs, Ga.sub.x Al.sub.1-x As, GaSb, InAs, or AlAs.
REFERENCES:
patent: 3304469 (1967-02-01), Weimer
patent: 3355637 (1967-11-01), Johnson
patent: 3969743 (1976-07-01), Gorski
Farrow Robin F. C.
Jones Gordon R.
Sullivan Philip W.
Edlow Martin H.
Jackson Jerome
The Secretary of State for Defence in Her Britannic Majesty's Go
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