Field effect transistor with combination Schottky-junction gate

Details Field effect transistor with combination Schottky-junction gate Field effect transistor with combination Schottky-junction gate

1980-06-20

1984-07-31

Wojciechowicz, Edward J.

357 15, 357 20, 357 61, 357 91, 357 86, H01L 2980, H01L 2948, H01L 2906, H01L 29161

Patent

active

044633661

ABSTRACT:
A field effect transistor device is constituted by a semiinsulating substrate consisting of a compound semiconductor, an N type semiconductor layer formed on the substrate, a plurality of P type semiconductor gate regions aligned along a straight line and extending through the semiconductor layer to reach the substrate, source and drain electrodes disposed on the semiconductor layer on the opposite sides of the drain regions, a gate electrode having an ohmic contact with the gate regions and having a Schottky contact with the semiconductor layer interposed between the gate regions. Two gate regions on the opposite ends of the array are in contact with the boundary region of the transistor.
The field effect transistor device is useful for fabricating an integrated circuit and consumes less electric power. Further it reduces dispersion in the gate pinch off voltage and can be prepared at a high yield.

REFERENCES:
patent: 2869054 (1959-01-01), Tucker
patent: 3044909 (1962-07-01), Shockley
patent: 4297718 (1981-10-01), Nishizawa et al.
patent: 4327475 (1982-05-01), Asai et al.
Solid State Electronics, 1975, vol. 18, pp. 349-353, Hunsperger et al.
Journal of Applied Physics, vol. 45, No. 8, Aug. 1974, Welch et al.
IEEE Transaction Microwave Theory and Techniques, vol. MTT-24, No. 6, Jun. 1976, Liechti.
IBM-Technical Disclosure Bulletin, vol. 14, No. 9, Feb. 1972 Remshardt et al.

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