Field effect transistor operating in the enhancement mode

Details Field effect transistor operating in the enhancement mode Field effect transistor operating in the enhancement mode

1984-05-07

1986-09-16

James, Andrew J.

357 15, 357 6, 357 61, 357 51, 357 2315, 357 2314, H01L 2980

Patent

active

046125604

ABSTRACT:
The invention relates to a field effect transistor for ultra-high frequencies, whose gate has a metal-insulator structure with a metal leak. This transistor has a substrate, an active layer, a source electrode and a drain electrode. Thus, its gate comprise a first metal coating forming a Schottky junction with the active layer, a dielectric layer having a controlled leak and a second control gate metal coating. The leak in the dielectric is adjusted in such a way that the Schottky interface and the control gate are in electrical balance at high frequencies. The dielectric is a metal-rich, non-stoichiometric oxide or nitride. Application to high-speed integrated circuits on GaAs.

REFERENCES:
patent: 4016643 (1977-04-01), Pucel et al.
patent: 4375643 (1983-03-01), Yeh et al.
patent: 4407004 (1983-09-01), Yeh
Di Mario et al, "Dual Electron Injector Structure", Applied Physics Letters, vol. 37, No. 1, Jul. 1980, pp. 61-64.
Foster et al, "Electrical Characteristics of the Silicon Nitride Gallium Arsenide Interface", Jour. of the Electro Chem. Soc., vol. 117, No. 11, Nov. '70, pp. 1410-1417.
IBM Technical Disclosure Bulletin, vol. 24, No. 5, Oct. 1981, New York, T. L. Andrade et al, "GaAs Lossy Gate Dielectric FET", p. 2452.
IBM Technical Disclosure Bulletin, vol. 24, No. 7A, Dec. 1981 (New York, U.S.), J. Boituzat et al, "Characterization Method of Metalloid Contamination in the Plasma Etching Step of Schottky Barrier Diodes", p. 3485.
Japanese Journal of Applied Physics, vol. 21, No. 2, Feb. 1982, Tokyo, T. Hotta et al. "A New AlGaAs/GaAs Heterojunction FET with Insulated Gate Structure (MISSFET)", pp. L122-L124.

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