Field-effect-transistor multiplexing/demultiplexing...

Details Field-effect-transistor multiplexing/demultiplexing... Field-effect-transistor multiplexing/demultiplexing...

2007-06-19

2009-12-15

Dang, Phuc T (Department: 2892)

Active solid-state devices (e.g., transistors, solid-state diode

Gate arrays

C257S205000, C257S206000, C365S163000, C365S185050

Reexamination Certificate

active

07633098

ABSTRACT:
This disclosure relates to field-effect-transistor (FET) multiplexing/demultiplexing architectures and methods for fabricating them. One of these FET multiplexing/demultiplexing architectures enables decoding of an array of tightly pitched conductive structures. Another enables efficient decoding of various types of conductive-structure arrays, tightly pitched or otherwise. Also, processes for forming FET multiplexing/demultiplexing architectures are disclosed that use alignment-independent processing steps. One of these processes uses one, low-accuracy imprinting step and further alignment-independent processing steps.

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