Field-effect transistor having a graded contact layer

Active solid-state devices (e.g. – transistors – solid-state diode – Heterojunction device – Field effect transistor

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257194, H01L 310328, H01L 310336

Patent

active

055214037

ABSTRACT:
A field-effect transistor includes a semi-insulating substrate, a semiconductor layer consisting of successive layers of GaAs compound semiconductor formed on the substrate, a gate electrode forming a Schottky contact with the semiconductor layer, and source and drain electrodes each forming an ohmic contact to the semiconductor layer. A semiconductor layer includes a buffer layer, an active layer, and a contact layer, where the impurity concentration in the contact layer is substantially equal to that in the active layer at the interface therewith. The impurity concentration in the contact layer increases continuously from the interface toward the upper surface of the contact layer. The field-effect transistor achieves a reduction in the ON resistance and an increase in the gate breakdown voltage at the same time, and to reduce power loss and increase efficiency.

REFERENCES:
patent: 5140386 (1992-08-01), Huang et al.
patent: 5428224 (1995-06-01), Hayashi et al.

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