Field effect transistor (FET) having wire channels and...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device

Reexamination Certificate

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Details

C257S210000, C257S241000, C257S287000, C257SE29049

Reexamination Certificate

active

11074900

ABSTRACT:
In a field effect transistor (FET), and a method of fabricating the same, the FET includes a semiconductor substrate, source and drain regions formed on the semiconductor substrate, a plurality of wire channels electrically connecting the source and drain regions, the plurality of wire channels being arranged in two columns and at least two rows, and a gate dielectric layer surrounding each of the plurality of wire channels and a gate electrode surrounding the gate dielectric layer and each of the plurality of wire channels.

REFERENCES:
patent: 4996574 (1991-02-01), Shiraski
patent: 5583362 (1996-12-01), Maegawa
patent: 5965914 (1999-10-01), Miyamoto
patent: 6413802 (2002-07-01), Hu et al.
patent: 6583014 (2003-06-01), Wu
patent: 6605847 (2003-08-01), Kim et al.
patent: 2004/0007738 (2004-01-01), Fried et al.
patent: 2004/0063286 (2004-04-01), Kim et al.
patent: 2005/0191795 (2005-09-01), Chidambarrao et al.

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