Field-effect transistor and method of producing same

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Junction field effect transistor

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257279, 257281, 257282, 257336, 257344, 257408, 257471, 437 16, 437 20, 437 40, 437 44, 437 45, 437141, 437176, 437200, 437228, H01L 2980, H01L 2126

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056400292

ABSTRACT:
A field-effect transistor has its gate length made to be minute, and a short channel effect is prevented. The field-effect transistor which attains the above objects has first and second semiconductor regions having different impurity concentrations disposed so as to be adjacent to each other. A source electrode is disposed on the second semiconductor region with a high impurity concentration, a drain electrode on the first semiconductor region with a low impurity concentration, and a gate electrode on the first semiconductor region side of the second semiconductor region. To produce the above field-effect transistor, a production method comprises a step of forming a first semiconductor region on the major surface of a semiconductor substrate, a step of forming a gate electrode to divide the first semiconductor region, and a step of doping impurities in the first semiconductor region on one side of the gate electrode with the gate electrode as the mask, to form a second semiconductor region which is of the same conductive type with the first semiconductor region and has a different impurity concentration from the first semiconductor region.

REFERENCES:
patent: 5036017 (1991-07-01), Noda
"GaAs LSI Process--Device Structure and Process Technology" T. Ohnishi et al., Semiconductor World, Jun. 1987, pp. 86-93 (with English abstract).
"A Self-Aligned Source/Drain Planar Device for GaAs MESFET Integrated Circuits", N. Yokoyama et al., Denshi-Tsushin-Gakkai (Institute of Electronics Communication Engineers of Japan), ED81-14, May 26, 1981, pp. 37-42 (with English abstract).

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