Field-effect transistor and method of manufacturing the same

Active solid-state devices (e.g. – transistors – solid-state diode – Heterojunction device – Field effect transistor

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257194, 257195, H01L31/328;31/336;31/72;31/109

Patent

active

059052775

ABSTRACT:
A channel layer made of n-type GaAs doped with Si, a hole absorption layer made of InGaAs having a valance band higher in energy level than that of GaAs, and an undoped layer made of GaAs are formed sequentially on a semi-insulating substrate made of GaAs. A gate recess region having a pair of sidewall portions each consisting of an upper sidewall composed of the undoped layer and a lower sidewall composed of the hole absorption layer is formed on the channel region. The channel region is exposed in the gate recess region. An indent having an undercut configuration is formed in the lower sidewall of the gate recess region. A gate electrode is formed to extend over a stepped portion composed of the sidewall portion of the gate recess region closer to a drain electrode.

REFERENCES:
patent: 3763408 (1973-10-01), Kano et al.
patent: 4350993 (1982-09-01), Wieder
patent: 5399886 (1995-03-01), Hasegawa
patent: 5504352 (1996-04-01), Tsutsui et al.
No Author, "Novel Fabrication Process for Creating T-Gate Transistors", IBM Technical Disclosure Bulletin, vol. 33, No. 4, Sep. 1990, pp. 200-201.

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