Field effect transistor and manufacturing method therefor

Details Field effect transistor and manufacturing method therefor Field effect transistor and manufacturing method therefor

1991-09-13

1993-02-16

Wojciechowicz, Edward J.

Active solid-state devices (e.g., transistors, solid-state diode

Heterojunction device

Field effect transistor

257280, 257655, 437 29, 437 41, 437175, 437911, H01L 2980, H01L 21265

Patent

active

051873796

ABSTRACT:
A field effect transistor includes a semi-insulating substrate, first conductivity type source and drain regions disposed in the substrate, a first conductivity type channel layer having a lower dopant concentration than the source and drain regions and disposed between and connecting the source and drain regions, and a second conductivity type buried region disposed in the substrate adjacent to and contacting the first conductivity type channel layer but not contacting the source and drain regions. The leakage current from the channel region is greatly reduced without increasing the parasitic gate capacitance.

REFERENCES:
patent: 4763183 (1988-08-01), Ng
patent: 4803526 (1989-02-01), Terada et al.
patent: 4894692 (1990-01-01), Noda et al.
patent: 5101245 (1992-03-01), Shimura
"GaAs Integrated Circuits", edited by J. Mun, BSP Professional Books.
Ishida et al, "A 5 Gb/s 4 Bit Shift Register With 0.5 .mu.m WNx-gate MESFETs", Conference on Solid States Devices and Materials, Japan, 1988, pp. 129-131.

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