Active solid-state devices (e.g. – transistors – solid-state diode – Non-single crystal – or recrystallized – semiconductor... – Field effect device in non-single crystal – or...
Reexamination Certificate
2001-09-19
2004-11-09
Munson, Gene M. (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Non-single crystal, or recrystallized, semiconductor...
Field effect device in non-single crystal, or...
C257S066000, C257S365000, C257S912000
Reexamination Certificate
active
06815719
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to field effect transistors and image display apparatus using the same, and more particularly to a field effect transistor operable at low voltages and image display apparatus capable of displaying an image at low power consumption.
2. Description of the Related Art
Recently, the advancement of liquid crystal display apparatus has been remarkable and thin display apparatus have rapidly diffused in place of CRTs (Cathode Ray Tubes) as the display devices that have been prevalent so far. As personal computers (PCs), digital video discs (DVDs), and digital television broadcasts have diffused, the thin display apparatus have been required to present a high-speed response and high-definition display. TFT liquid crystal display panels have been known as liquid crystal display devices capable of meeting such requirement in the past.
Referring to
FIG. 19
, one example of the conventional TFT liquid crystal display panels will be described. The panel illustrated is provided on a glass substrate
210
as an example. Pixels
201
each having a liquid crystal capacitance
204
are arranged in the form of a matrix on the glass substrate
210
wherein the pixels arranged in the respective rows are connected via corresponding gate lines
205
to a gate line driver
206
and the pixels arranged in the respective columns are connected via corresponding signal lines
207
to a signal line driver
208
.
For simplifying purposes, only four pixels
201
are illustrated. The liquid crystal capacitance points to a liquid crystal unit element (cell), which can be regarded equivalently as static capacitance. Thus, this name is used. In each pixel
201
, the liquid crystal capacitance
204
is connected via series-connected pixel TFTs (Thin Film Transistors)
202
and
203
to an associated signal line
207
.
The signal line driver
208
is connected to a signal input line
209
that receives a signal voltage externally. The respective pixel TFTs
202
and
203
, and the gate and signal line drivers
206
and
208
each comprise a polysilicon TFT.
Operation of the TFT liquid crystal display panel will be described next. The signal line driver
208
sequentially distributes the signal voltage received via the signal input line
209
to the respective signal lines
207
.
The gate line driver
206
sequentially drives the respective gate lines
205
to open/close the respective pairs of pixel TFTs
202
and
203
in the rows corresponding to the gate lines
205
, so that the respective signal voltages outputted by the signal driver
208
to the corresponding signal lines
207
are delivered to the liquid crystal capacitance
204
of the respective pixels
201
concerned.
The signal voltage inputted to each liquid crystal capacitance
204
of its pixel modulates the optical characteristic of the liquid crystal capacitance of the pixel. As a result, an image depending on the inputted signal voltage is displayed on the TFT liquid crystal display panel.
The TFT liquid crystal display panels of this type are detailed, for example, “SID 99, Digest of Technical Papers”, pp. 172-179 (1999). This technique, however, fails to allow for TFTs that operate at low voltages, so that image display apparatus of low power consumption are difficult to realize because the conventional TFTs are difficult to drive at low voltages.
The problems with the TFTs will be described next with reference to
FIGS. 20A-20C
, which are a cross-sectional view of the conventional n-channel TFT, an ideal potential and current-voltage characteristic representation of the n-channel TFT having no carrier capture levels, and a real potential and current-voltage characteristic representation having carrier capture levels, respectively.
As shown in
FIG. 20A
, the TFT has a source area composed of an n
+
higher density impurity injection area
221
and an n
−
lower density impurity injection area
222
; a drain area composed of an n
+
higher-density impurity injection area
223
and an lower n
−
impurity injection area
224
; a channel forming area including an impurity non-injection area
225
designated by i and a gate electrode
220
.
Thus, the TFT basically comprises a MOSFET (insulated gate-type field effect transistor). The reference character i-attached to the impurity non-injection area represents a so-called intrinsic semiconductor.
FIGS. 20A-20C
omit representation of an insulating layer present between the gate electrode
220
and the i-impurity non-injection area
225
, and other insulators formed in other areas for convenience of simplicity.
The operation of the TFT will be described next. At the beginning, for convenience of explanation, an ideal TFT having no channel carrier capture levels in its channel forming area
225
unlike the conventional TFT will be explained.
As shown in
FIG. 20B
illustrating potentials, in the ideal TFT electrons e
−
injected from the source electrode
226
diffuse along a channel
228
to the drain electrode
227
and drift to form a channel current.
The gate voltage Vgs to channel current Ids characteristic in this case is shown rightward in FIG.
20
B. In this Figure, when there is no stray capacitance in the channel an area called a tailing area shown by a double-headed arrow has a 60 mV/figure current value characteristic as a theoretical limit (kT/q·ln 10=60 mV where k is Bolzman constant, T is temperature, and q is a unit charge quantity).
This implies that the amplitude of the gate voltage necessary for controlling, for example, a current value of five figures does not need more than 300 mV.
Since the essence of the explanation is not influenced in
FIGS. 20B and 20C
, the higher and lower impurity injection areas shown by n
+
and n
−
, respectively, are not shown distinguishably in the potential representation.
In the case of a real conventional TFT having a channel forming area
225
of polycrystal silicon, there are many channel carrier capture levels due to crystal defects and grain boundaries in the channel forming area
226
as the actual problem. Next, the operation of this TFT will be described.
Thus, as shown in
FIG. 20C
channel carriers
231
captured by those capture levels form many potential barriers
230
in the channel to thereby hinder diffusion and drifting of the channel current.
Since the channel carrier capture levels are present in band gaps in the Si-more channel carriers are captured as a higher positive gate voltage is applied to the gate of the TFT to thereby further grow the potential barriers
230
. In other words, as a higher positive voltage is applied to the gate of the TFT, a threshold voltage Vth of the TFT rises higher.
As a result, as shown by the gate voltage Vgs to channel current Ids characteristic right in
FIG. 20C
, the tailing area portion shown by the double-headed arrow has a considerably flattened characteristic with a gradient of 200 mV/figure current or more. When the gradient is, for example, “300 mV/figure current”, this value implies that the amplitude of the gate voltage necessary for control of a current, for example, of five figures requires 1500 mV.
In addition, in the actual case where there are actually channel carrier capture levels, the growth of the potential barriers
230
increases an apparent threshold voltage Vth to thereby greatly decrease the channel current itself corresponding to the same gate voltage. As a result, a drive voltage required to drive the circuit increase greatly.
As the actual problem, generally a 10-15 V drive voltage is required to maintain a stabilized operation of the conventional TFT having the channel forming area
225
of polycrystal silicon. That is, the operational voltage of the TFT is so high that a reduction in the power consumption in the low-voltage drive is difficult. Although the above description was made with reference to the n-channel TFT, the same applies to the p-channel TFT.
SUMMERY OF THE INVENTION
It is therefore an object of the present invention to prov
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